SSD RAID Stripe Deletion Aligned to FDP Region Sizes

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Solution Overview

Problem

Conventional memory sub-systems face inefficiencies in managing error correction parity information stripes due to misalignment with region sizes in Flexible Data Placement (FDP) systems, leading to slowed performance and prolonged operations.

Innovation Solution

A memory controller ensures sufficient error correction parity information stripes are deleted to provide at least one completely empty region in each memory component by computing the quantity based on region sizes, allowing flexible region alignment independent of physical layer dependencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If error correction parity information stripes are deleted without considering region size alignment, then deletion operations can be performed quickly, but incomplete region deletion occurs leading to prolonged garbage collection operations and reduced performance

Engineering Contradiction:
Improvedeletion operation speedVSAvoidregion deletion completeness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary calculation of the quantity of error correction parity information stripes to delete based on region sizes before executing the deletion operation. This preliminary action ensures that the deletion will result in complete region emptying, preventing the need for prolonged garbage collection operations later.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from region size information to adjust the deletion quantity calculation. By continuously monitoring region sizes and using this information to determine the appropriate number of stripes to delete, the system ensures complete region deletion while maintaining efficient operation.

Inventive Principle:
Principle #23Feedback

2Reliability

If the quantity of error correction parity information stripes to delete is calculated based on region sizes, then complete region deletion is ensured, but the computation complexity increases

Engineering Contradiction:
Improveregion deletion completenessVSAvoidcomputation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system changes the parameter used for deletion calculation from fixed or simplified metrics to dynamic region size parameters. By base the quantity calculation on actual region sizes, the system ensures accurate and complete region deletion while the computational complexity is managed through efficient algorithms.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If Flexible Data Placement is implemented with multiple region sizes, then storage flexibility is improved, but alignment between error correction stripes and regions becomes difficult causing performance degradation

Engineering Contradiction:
Improvestorage flexibilityVSAvoidoperation efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system implements dynamic adaptation by calculating the quantity of stripes to delete based on the specific region sizes present in the system. This dynamic approach allows the system to maintain complete region deletion across multiple region sizes, preserving storage flexibility while preventing performance degradation from misalignment.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260037436A1Raid region alignment for FDP compliant SSD
Publication Date: 2026.02.05 MICRON TECHNOLOGY INC
  • US20260037436A1 patent drawing
  • US20260037436A1 patent drawing
  • US20260037436A1 patent drawing

AI summary

The disclosure configures a memory sub-system controller to perform Redundant Array of Independent Disks (RAID) stripe deletion based on physical region size. The controller stores a set of data across a plurality of memory components, a first of the plurality of components being configured to store data in a first set of regions, a second of the plurality of components being configured to store data in a second set of regions. The controller generates a plurality of error correction parity information stripes for multiple collections of the set of data and computes a quantity of the plurality of error correction parity information stripes to delete based on sizes of each region in the first and second sets of regions. The controller deletes one or more of the plurality of error correction parity information stripes based on the computed quantity.