Solid State Storage Read Refresh Control for 3D Memory Data Accuracy

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Solution Overview

Problem

Conventional methods for controlling solid state storage devices with 3D memory arrays face challenges in maintaining data accuracy due to shifting threshold voltage distribution curves caused by read-hot and read-cold data, leading to increased data error rates and reduced reliability.

Innovation Solution

A control method that monitors the elapsed time and failure bit count to determine when to perform read refresh or real refresh operations, distinguishing between read-hot and read-cold data to manage and reprogram memory cells accordingly, thereby maintaining data accuracy and preventing threshold voltage shifts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read refresh operations are performed frequently to maintain data accuracy, then data error rate decreases, but device operation complexity and energy consumption increase

Engineering Contradiction:
Improvedata accuracyVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing read refresh operations before data errors actually occur. The controller proactively identifies memory regions that will experience threshold voltage shifts due to read-cold data conditions and refreshes them in advance, preventing data accuracy degradation rather than reacting to errors after they occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms by monitoring elapsed time since last read operations and tracking the number of read operations on memory regions. This feedback information is used to dynamically adjust refresh timing and identify which memory regions require refresh operations, optimizing the balance between data accuracy and operational efficiency.

Inventive Principle:
Principle #23Feedback

2Reliability

If real refresh operations are performed to correct threshold voltage shifts, then data accuracy improves, but processing time and productivity decrease

Engineering Contradiction:
Improvedata accuracyVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies segmentation by dividing the memory array into multiple independent memory regions and handling refresh operations for each region separately based on its specific read pattern characteristics. This allows parallel processing of refresh operations across different regions and avoids unnecessary full-array refreshes, thereby maintaining data accuracy while minimizing impact on overall processing throughput.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements partial action by performing refresh operations only on specific memory regions that exhibit read-cold data characteristics, rather than refreshing the entire memory array. This selective approach applies refresh actions only where necessary, reducing the total processing time and maintaining productivity while still correcting threshold voltage shifts in affected regions.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If read refresh operations are delayed to improve productivity, then processing speed increases, but threshold voltage distribution curves shift and data reliability decreases

Engineering Contradiction:
Improveprocessing speedVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies dynamics by making the refresh timing adaptive rather than fixed. The refresh operation timing is dynamically adjusted based on monitored parameters such as elapsed time since last read and the number of read operations performed on each memory region. This dynamic approach allows the system to optimize between productivity and reliability in real-time based on actual memory usage patterns.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10008275B1Control method for solid state storage device
Publication Date: 2018.06.26 SOLID STATE STORAGE TECH CORP
  • US10008275B1 patent drawing
  • US10008275B1 patent drawing
  • US10008275B1 patent drawing

AI summary

A control method for a solid state storage device is provided. Firstly, an elapsed time period of the solid state storage device is counted when the solid state storage device is in a normal working state. Then, a read refresh operation is performed on a memory array of the solid state storage device at a first time interval.