SSD Read Retry Latency Reduction via Codeword Prioritization

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Solution Overview

Problem

Solid state drives (SSDs) face high read retry latency due to the complexity of managing cross-die logical pages, which are exacerbated by the need to handle two types of codewords across multiple memory dies, leading to unsatisfactory read retry performance.

Innovation Solution

The method involves prioritizing the read recovery of a regular codeword over an irregular codeword for cross-die logical pages by sequentially adjusting read voltage levels across the dies using a read retry table, optimizing the read voltage levels for successful decoding and reducing the complexity of read retry operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read retry operations are performed for cross-die logical pages by sequentially advancing through read retry tables for multiple dies, then data integrity is improved, but read retry latency increases

Engineering Contradiction:
Improvedata integrityVSAvoidread retry latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the read retry operation into distinct phases: first attempting to read the regular codeword stored on a single die, then attempting to read the irregular codeword stored across multiple dies. This segmentation allows the system to handle the more time-consuming cross-die read operation only when necessary, rather than always performing it, thus reducing average read retry latency while maintaining data integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by first attempting to read the regular codeword that is stored on a single die before attempting the more complex cross-die read operation. This preliminary attempt can succeed quickly for many cases, avoiding the need to perform the time-consuming sequential read retry operations across multiple dies, thereby reducing overall read retry latency.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If read retry operations handle both regular and irregular codewords across multiple dies, then data recovery capability is improved, but operational complexity increases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidoperational complexity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent segments the data storage into two distinct types: regular codewords stored on single dies and irregular codewords stored across multiple dies. This segmentation allows the controller to apply different read retry strategies for each type, simplifying the overall operational complexity by treating different codeword types differently rather than using a single complex approach for all codewords.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by performing read retry operations only on the necessary portions of the storage system. For regular codewords, only the single die containing the codeword is accessed. For irregular codewords, only the specific multiple dies containing portions of the codeword are accessed. This avoids unnecessary operations on other dies, reducing operational complexity while maintaining full data recovery capability.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10732899B2Error recovery of cross-die logical pages in a solid state device
Publication Date: 2020.08.04 SANDISK TECHNOLOGIES LLC
  • US10732899B2 patent drawing
  • US10732899B2 patent drawing
  • US10732899B2 patent drawing

AI summary

Exemplary methods and apparatus are provided to reduce read retry latency within solid state devices (SSDs) with non-volatile memories (NVMs). The reduction in read retry latency may be accomplished in some examples by prioritizing read recovery of a regular codeword over an irregular codeword for a cross-die logical page, irrespective of the location in the page with read errors. In an illustrative example, a processor (a) performs a read retry for a second codeword by setting a read voltage level to a first level for a first die, then advancing through a read retry table for the second die until the second codeword is read successfully, and (b) then performs a read retry for the first codeword by setting a read voltage level for the second die to a second level, then advancing through a read retry table for the first die until the first codeword is successfully read.