SSD Self-Test with Multi-Code-Rate Bad Block Screening
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Solution Overview
Problem
Existing manufacturer self-test (MST) processes for solid-state drives (SSDs) are inefficient in detecting bad blocks and initializing error correction code rates, leading to inconsistent test times and potential data loss due to infant mortality in flash memory.
Innovation Solution
A method and apparatus that perform a multi-plane scan capable of detecting bad blocks in both multi-plane and single-plane configurations, embed a thorough code rate test within the MST, and minimize test time by initializing a bad block list and code rate table, ensuring consistent testing across SSDs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a traditional manufacturer self-test process is used, then the testing procedure is simple, but the test time is long and detection precision is insufficient
Solution Approach 1:
The patent segments the code rate testing process into multiple parallel testing threads, each handling different code rates simultaneously. This allows the controller to test multiple code rates in parallel rather than sequentially, significantly reducing the overall test time while maintaining thorough detection precision for identifying bad blocks across all code rates.
Solution Approach 2:
The patent performs preliminary identification of bad blocks using a first code rate before conducting the comprehensive multi-code rate testing. This preliminary action filters out obviously defective blocks early in the process, allowing the subsequent detailed testing to focus on blocks that require more thorough evaluation, thereby optimizing the overall test time without compromising detection precision.
2Measurement precision
If a comprehensive code rate test is performed, then detection precision is improved, but test time increases
Solution Approach 1:
The patent divides the comprehensive code rate testing into multiple parallel testing operations, where each testing thread handles a specific code rate simultaneously. This parallelization maintains the thorough detection precision required for comprehensive testing while reducing the total test time by eliminating sequential execution overhead.
Solution Approach 2:
The patent implements a two-stage testing approach where a preliminary bad block identification pass is performed first, followed by a more focused comprehensive code rate test on blocks that pass the initial screening. This partial action approach ensures thorough detection precision for critical blocks while avoiding unnecessary extensive testing on blocks that are already identified as defective.
3Reliability
If multiple code rates are tested, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal bad block list data structure that can accommodate and track bad blocks identified under multiple different code rates. This universal structure provides a unified interface for managing blocks regardless of which code rate caused the failure, simplifying the overall system architecture while maintaining the ability to detect reliability issues across all code rates through a single centralized mechanism.
Solution Approach 2:
The patent employs a feedback mechanism where results from testing at one code rate inform subsequent testing at other code rates. The bad block list is dynamically updated based on feedback from each testing operation, allowing the system to adaptively adjust testing priorities and avoid redundant testing, thereby improving reliability through comprehensive testing while managing process complexity through intelligent feedback-driven control.
Data Source
AI summary
An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to a plurality of blocks of the memory that are not marked as bad on a block list, perform a code rate test that programs the plurality of blocks of the memory at three or more code rates of an error correction code scheme, and mark any of the plurality of blocks identified as bad during the code rate test on the block list.