SSD Self-Test with Multi-Plane Bad Block and Code Rate Screening
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Solution Overview
Problem
Existing manufacturer self-test (MST) processes for solid-state drives (SSDs) are inefficient in detecting bad blocks and initializing code rates, leading to inconsistent test times and potential data loss due to infant mortality in flash memory, which can result in failed blocks during manufacturing.
Innovation Solution
The implementation of a multi-plane scan capable of detecting bad blocks in both multi-plane and single-plane configurations, embedding a thorough code rate test within the MST, and minimizing test time by performing error correction code (ECC) rate tests on every block, while maintaining consistency across multiple SSDs, using an adaptive code rate policy for LDPC codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional manufacturer self-test is performed on SSDs, then the drive can be qualified for shipping, but the test time becomes inconsistent across different drives and infant mortality bad blocks may be missed
Solution Approach 1:
The patent applies preliminary action by performing a multi-plane scan during the manufacturer self-test before the drive is shipped. This preliminary testing identifies and marks bad blocks early in the manufacturing process, preventing infant mortality failures during customer operation. The scan is embedded in the pre-conditioning phase, ensuring thorough detection before normal operations begin.
Solution Approach 2:
The patent segments the memory into multiple planes and performs independent scans on each plane. This segmentation allows the test to systematically cover all memory blocks without missing potential bad blocks. By dividing the memory space into manageable planes that can be scanned separately, the test achieves comprehensive coverage while maintaining consistent timing across different drives.
2Manufacturing precision
If a thorough code rate test is performed on every block, then code rates are properly initialized and bad blocks are detected, but the test time increases
Solution Approach 1:
The patent implements partial action by performing code rate tests on a representative sample of blocks during the multi-plane scan rather than every single block. This approach initializes code rates sufficiently for manufacturing precision while avoiding the excessive time cost of testing every block. The selective testing maintains quality standards without extending MST execution time unduly.
Solution Approach 2:
The patent changes the testing parameters dynamically during the multi-plane scan. Instead of applying a uniform thorough test to all blocks, the system adjusts the depth and intensity of code rate testing based on plane characteristics and preliminary scan results. This parameter adaptation ensures adequate code rate initialization while optimizing test execution time.
3Measurement precision
If multiple scan iterations are performed to detect all bad blocks, then detection accuracy improves, but productivity decreases
Solution Approach 1:
The patent performs a preliminary multi-plane scan during the manufacturer self-test to identify and mark bad blocks before shipping. This preliminary detection action achieves sufficient measurement precision for manufacturing purposes without requiring multiple iterative scans. The early identification of bad blocks maintains detection accuracy while preserving manufacturing throughput.
Solution Approach 2:
The patent applies partial action by performing a single comprehensive multi-plane scan rather than multiple iterative scans. This approach achieves adequate bad block detection accuracy for manufacturing quality control while avoiding the productivity loss associated with repeated scanning iterations. The single scan is designed to be sufficiently thorough for the intended application.
Data Source
AI summary
An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to a plurality of blocks of the memory that are not marked as bad on a block list, perform a code rate test that programs the plurality of blocks of the memory at three or more code rates of an error correction code scheme, and mark any of the plurality of blocks identified as bad during the code rate test on the block list.