SSD Storage Control Unit Dynamic Mode Switching for Data Retention
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Solution Overview
Problem
In information processing apparatuses using solid state drives (SSDs) with multi-bit cells, there is a tendency for data retention to be shortened due to increased rewrite cycles, which can lead to data corruption and unreliable storage over time.
Innovation Solution
The implementation of a high-quality storage mode in SSDs, where multi-bit data is stored with a narrower threshold voltage variation width when the number of rewrites exceeds a threshold, helps to maintain data integrity and extend the data retention period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-bit cells are used to increase SSD capacity, then storage capacity is improved, but data retention period is shortened
Solution Approach 1:
The patent dynamically switches between normal storage mode and high-quality storage mode based on the number of rewrites. When the rewrite count reaches a threshold, the system transitions to high-quality storage mode with narrower threshold voltage variation width, thereby adapting the storage characteristics to the wear state and maintaining data retention
Solution Approach 2:
The patent changes the threshold voltage variation width parameter based on rewrite count. In high-quality storage mode, a narrower threshold voltage variation width is applied to multi-bit data, which improves data retention by reducing the spread of threshold voltages that cause read errors
2Adaptability or versatility
If the number of rewrites increases, then storage versatility is improved, but data retention period is shortened
Solution Approach 1:
The system dynamically adjusts storage mode based on rewrite count, allowing the SSD to maintain high versatility for heavy users while automatically switching to high-quality storage mode when wear thresholds are reached, thereby preserving data retention period even after extensive use
3Speed
If normal storage mode is used for speed, then writing speed is improved, but data retention is reduced
Solution Approach 1:
The patent implements dynamic mode switching between normal storage mode (faster writing) and high-quality storage mode (better retention). The system monitors rewrite counts and automatically transitions to high-quality mode when thresholds are reached, balancing speed and retention based on actual wear state
Solution Approach 2:
The threshold voltage variation width parameter is changed based on rewrite count. In high-quality storage mode, the narrower threshold voltage variation width provides better data retention at the cost of potentially reduced writing speed, but this is only applied when necessary based on wear level
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces data corruption and ensures a guaranteed data retention period, even for heavy users or after prolonged usage, by switching to a high-quality storage mode based on rewrite thresholds.
Implementation Method 1
an application process of applying a voltage for storing the data to the multi-bit cell for a predetermined period
Implementation Method 2
store the multi-bit data with a high-quality storage mode in which a variation width of a threshold voltage is narrower
Data Source
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Figure 2
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AI summary
An object is to reduce data corruption of an SSD and to guarantee a data retention period. An information processing apparatus includes: a solid state drive (SSD) including an electrically rewritable non-volatile storage unit comprising a multi-bit cell for storing multi-bit data; and a main control unit configured to execute processing based on data stored in the SSD, in which the SSD includes a storage control unit, which is a storage control unit configured to control access to the non-volatile storage unit, and configured to, when the multi-bit data is stored in the multi-bit cell, store the multi-bit data with a high-quality storage mode in which a variation width of a threshold voltage is narrower than in a normal storage mode in response to the number of rewrites executed in the multi-bit cell being equal to or greater than a threshold number of rewrites.