SSD Trim Table for Write Amplification Reduction

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Solution Overview

Problem

Conventional SSDs face inefficiencies in handling deallocate commands, particularly in maintaining data coherence and reducing write amplification, especially during power failures, as they store these commands in non-volatile memory, leading to increased write amplification and loss of data integrity.

Innovation Solution

The SSD system processes deallocate commands by storing them in a trim table within volatile memory, using a trim signature to indicate deallocated ranges, and records the sequence position of commands to maintain data coherence, reducing write amplification and ensuring efficient garbage collection and recovery post-power failure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If deallocate commands are stored in non-volatile memory, then data persistence is improved, but write amplification increases and over provisioning space is reduced

Engineering Contradiction:
Improvedata persistenceVSAvoidwrite amplification
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the deallocate command information from non-volatile memory storage and relocates it to volatile memory (specifically a trim table in the controller's memory). This separation allows the SSD to maintain deallocation tracking without consuming宝贵的 over provisioning space in the non-volatile memory, thereby reducing write amplification while preserving data persistence through the volatile memory's ability to maintain state during operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a trim table as an intermediary data structure that mediates between the host's deallocate commands and the SSD's internal mapping tables. This trim table, maintained in volatile memory, serves as a buffer that tracks deallocated logical block addresses without requiring permanent storage in non-volatile memory, thus reducing write amplification while maintaining the necessary deallocation information for garbage collection and wear leveling operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If deallocate commands are stored in non-volatile memory, then command recovery after power failure is improved, but data integrity is reduced due to uncorrectable errors

Engineering Contradiction:
Improvecommand recoveryVSAvoiddata integrity
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent introduces a trim table in volatile memory as an intermediary that maintains deallocate command information during operation. This trim table can be protected by copying critical information to non-volatile memory or using error correction codes, providing a layered approach that maintains data integrity while enabling recovery. The volatile memory's faster access and potential for error correction provides better data integrity than raw non-volatile memory storage.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If deallocate commands are processed by copying valid data pages to new blocks, then data validity is maintained, but write amplification increases

Engineering Contradiction:
Improvedata validityVSAvoidwrite amplification
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by maintaining a trim table that pre-identifies deallocated logical block addresses before garbage collection operations. This allows the SSD controller to proactively identify which data pages are still valid and which can be safely erased, enabling more efficient garbage collection that reduces the need to copy valid data pages. By having deallocation information readily available in volatile memory, the system can perform preliminary sorting and identification of valid data, reducing unnecessary write operations during garbage collection.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10909030B2Enhanced trim command support for solid state drives
Publication Date: 2021.02.02 KIOXIA CORP
  • US10909030B2 patent drawing
  • US10909030B2 patent drawing
  • US10909030B2 patent drawing

AI summary

In an SSD including a host interface, controller, non-volatile memory coupled to the controller, and volatile memory, data is stored in non-volatile memory in clusters having a cluster start address and a cluster end address. A mapping table is maintained in volatile memory, which indicates by a trim signature deallocated clusters in non-volatile memory. The trim table is populated with deallocated ranges and an associated offset within the non-volatile memory. The controller receives from the host interface a sequence of commands including a deallocate command including at least one address range including a start address and an end address, or a start address and a length of the address range. The controller processes the deallocate command by selecting one or both of a write-to-non-volatile-memory action and a record-to-volatile-memory action. In cases of power failure, the mapping table is restored for deallocated ranges at specific offsets recorded in the trim table.