Wafer-Bonded SSD Structure to Eliminate Die Dicing
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Solution Overview
Problem
The existing methods for manufacturing solid state drives (SSDs) are labor and cost intensive due to the need for numerous fabrication and assembly steps, including dicing semiconductor dies from wafers and assembling them into packages, which complicates the process and increases costs.
Innovation Solution
The approach involves forming SSD devices directly from whole semiconductor wafers by bonding a first wafer with die bond pads to a second wafer with electrical interconnects, where the interconnects' terminals align and bond with the die bond pads, allowing SSD controllers to be mounted on the wafer, thereby eliminating the need for individual die assembly and dicing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional SIP/MCM assembly methods are used with dicing and individual die mounting, then reliable electrical connections are achieved, but manufacturing complexity and labor costs increase significantly
Solution Approach 1:
The patent merges multiple discrete semiconductor dies into a single integrated wafer structure. Instead of assembling individual diced dies onto a substrate, the invention bonds multiple dies together in a grid pattern on a single wafer, creating a unified device that functions as one unit. This eliminates the need for complex multi-step assembly processes while maintaining reliable electrical connections through the integrated architecture.
Solution Approach 2:
The wafer structure serves multiple functions simultaneously: it provides the substrate for mounting dies, acts as the interconnection medium through bonded wires, and functions as the final package structure. This multi-functionality eliminates the need for separate substrate, wire bond, and package components, simplifying the overall manufacturing process while ensuring reliable electrical connectivity.
2Reliability
If multiple fabrication and assembly steps are used to form and dice semiconductor dies, then functional memory devices are produced, but manufacturing time and labor costs increase
Solution Approach 1:
The patent performs preliminary bonding of multiple dies together on the wafer during the fabrication process itself, before final assembly. The dies are bonded to the wafer in a grid pattern with electrical interconnections established in advance, allowing the entire array to be processed as a single unit. This preliminary action eliminates the need for time-consuming individual die assembly later in the manufacturing process.
Solution Approach 2:
Multiple fabrication operations are merged into a single wafer-level process. Instead of fabricating, dicing, and assembling individual dies separately, the invention combines these steps into one integrated wafer fabrication process where multiple dies are formed and interconnected simultaneously, dramatically improving manufacturing throughput.
3Reliability
If individual dies are diced and assembled into packages, then storage devices are formed, but material waste and manufacturing costs increase
Solution Approach 1:
The patent combines multiple dies and their interconnection structures into a single wafer-based device, eliminating the need for separate packaging materials for each individual die. This merging approach reduces material waste by eliminating redundant packaging components and reduces manufacturing costs through economies of scale in the fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the complexity and cost of SSD manufacturing by eliminating the need for individual die assembly and dicing, allowing for easier scaling of storage capacity and simplifying the fabrication process.
Implementation Method 1
bonding a first wafer with die bond pads to a second wafer with electrical interconnects, where the interconnects' terminals align and bond with the die bond pads
Data Source
AI summary
A solid state drive (SSD) wafer device includes first and second semiconductor wafers coupled together. The first wafer may include a number of memory dies with die bond pads, and the second wafer may include a number of electrical interconnects, each including first and second terminals at opposed ends of the electrical interconnect. When the wafers are bonded together, the first terminals of the second wafer are bonded to the die bond pads of the memory dies of the first wafer. The second terminals are left exposed to couple with an SSD controller, which controls the transfer of data and signals between the memory dies of the first wafer and a host device such as a server in a datacenter.


