Wear Leveling in Solid State Drives Using Mixed Memory Types
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Solution Overview
Problem
Erasable computer storage media, such as flash memory, have limited service life due to program erase (P/E) cycles, leading to uneven wear across memory blocks, which can result in unreliable data storage as the P/E budget is depleted.
Innovation Solution
A solid state drive (SSD) that uses a pool of memory units of different types (SLC, MLC, TLC, QLC) and performs wear leveling by distributing erasure operations based on program erase budgets, ensuring that all memory types approach their end of service life simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If wear leveling is performed to distribute erasure operations across memory blocks, then the useful service life of the SSD is extended, but the device complexity increases due to the need for address mapping and wear tracking mechanisms
Solution Approach 1:
The memory storage is divided into multiple memory blocks with different types (SLC, MLC, TLC, QLC), each having different P/E budgets. The system segments the wear leveling process by tracking and managing each block's wear independently based on its type, allowing distributed erasure operations that extend overall service life while maintaining manageable complexity through structured organization.
Solution Approach 2:
The address map is dynamically adjusted based on wear levels of different memory blocks. The system performs wear leveling by redistributing data across blocks with lower wear counts, creating a dynamic mapping that adapts to changing wear conditions. This dynamic approach extends service life by preventing any single block from reaching its P/E limit prematurely.
2Quantity of substance
If different types of flash memories (SLC, MLC, TLC, QLC) are used in a pool, then storage capacity and cost efficiency are improved, but reliability becomes more challenging to maintain due to varying P/E budgets
Solution Approach 1:
Different memory blocks are assigned different qualities based on their type (SLC, MLC, TLC, QLC) and corresponding P/E budgets. The system applies local quality by tracking wear independently for each block type and using wear leveling strategies that account for these differences. This allows the system to maximize storage capacity through mixed memory types while maintaining reliability by ensuring all blocks reach their wear limits simultaneously.
Solution Approach 2:
The system implements feedback mechanisms to track the wear level of each memory block and adjusts data placement accordingly. By monitoring P/E cycle counts and using this feedback to redistribute data, the system maintains reliability across heterogeneous memory types. The wear leveling process uses feedback about block wear states to dynamically adjust the address map, ensuring balanced wear distribution.
3Reliability
If wear leveling algorithms continuously redistribute data to balance wear, then data storage reliability is maintained, but write performance decreases due to additional operations
Solution Approach 1:
The system performs partial wear leveling operations rather than continuous full redistribution. Wear leveling is triggered only when necessary based on wear thresholds and P/E budget considerations. This partial action approach maintains reliability by performing wear balancing when needed while minimizing the performance impact of frequent data redistribution operations.
Data Source
AI summary
A computer storage device having: a host interface; a controller; non-volatile storage media having memory units of different types and having different program erase budgets; and firmware. The firmware instructs the controller to: generate an address map mapping logical addresses to physical addresses of the memory units the different types; and adjust the address map based at least in part on the program erase budgets to level wear across the memory units of the different types.