SSD Write Buffer Early Release Using a Temporary Register

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Solution Overview

Problem

The delay in write buffer deallocation in solid state drives due to time-consuming data programming operations leads to reduced system throughput and increased buffer memory requirements.

Innovation Solution

Implementing early deallocation of the write buffer after data is transferred to a temporary register in the solid state memory, with mechanisms for data recovery to mitigate potential data loss, such as using additional nonvolatile memory or Reed-Solomon coding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the write buffer is deallocated only after successful data programming to solid state memory, then data integrity is ensured, but system throughput is reduced and buffer memory requirements increase

Engineering Contradiction:
Improvedata integrityVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by deallocating the write buffer early after data is transferred to the temporary register, before the time-consuming programming operation completes. This allows the buffer to be freed and reused while the programming proceeds in the background, thus improving throughput without compromising data integrity since the data is already safely stored in the temporary register.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the write buffer is deallocated only after successful data programming to solid state memory, then data integrity is ensured, but buffer memory requirements increase

Engineering Contradiction:
Improvedata integrityVSAvoidbuffer memory requirements
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies preliminary action by deallocating the write buffer early after data is transferred to the temporary register, before the time-consuming programming operation completes. This allows the buffer to be freed and reused while the programming proceeds in the background, thus reducing buffer memory requirements while maintaining data integrity through the temporary register storage.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If early deallocation of write buffer is implemented, then system throughput is improved and buffer memory requirements are reduced, but data loss risk increases

Engineering Contradiction:
Improvesystem throughputVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent uses the temporary register as an intermediary storage element between the write buffer and the solid state memory. The data is first transferred to the temporary register (which has sufficient capacity to hold the data), allowing the write buffer to be deallocated early. The temporary register acts as a safe holding place during the programming operation, eliminating data loss risk while enabling early buffer release.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9170939B1Early de-allocation of write buffer in an SSD
Publication Date: 2015.10.27 PALISADE TECH LLP
  • US9170939B1 patent drawing
  • US9170939B1 patent drawing
  • US9170939B1 patent drawing

AI summary

A data storage system includes: non-volatile solid state memory including non-volatile storage units and a temporary register; a data storage controller configured to receive a write command including a plurality of logical segments of data from a host; a write buffer allocated to receive a portion of the plurality of logical segments of data and accumulate a physical segment of data corresponding to a write unit of the solid state memory; a solid state memory controller configured to transmit the accumulated data from the write buffer to the temporary storage register each time the write buffer accumulates a physical segment of data. The data storage controller acknowledges completion of the write command to the host after the last logical segment of data is written to the write buffer; and deallocates the write buffer after the solid state memory completes reception of the accumulated data into the temporary storage register.