SSD Write Mapping for Consecutive LBA Cache Entries

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Solution Overview

Problem

The existing method for writing data to a Solid State Disk (SSD) involves multiple iterations through cache entries to determine consecutive Logical Block Addresses (LBAs), leading to significant performance degradation due to excessive DRAM access and cycle determinations.

Innovation Solution

The method involves determining if the LBAs are consecutive before generating a mapping table, reducing the need for iterative DRAM access by identifying continuity in the cache entries, thereby optimizing the write operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the WM module iterates through each cache entry in the CCB to determine consecutive LBAs, then the mapping table can be accurately generated, but the write operation performance deteriorates due to excessive DRAM access and cycle determinations

Engineering Contradiction:
Improvemapping table accuracyVSAvoidwrite operation performance
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by having the DM module determine whether LBAs are consecutive before transferring data to the WM module. This is achieved by setting a first flag bit in the CCB structure that indicates LBA consecutiveness. By performing this determination in advance, the patent avoids the need for the WM module to iterate through cache entries and perform cycle determinations, thus resolving the contradiction between mapping table accuracy and write operation performance.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the DM module generates and updates cache entries for each piece of data, then the L2P table can be accurately pointed to buffer addresses, but the device complexity increases due to additional cache management operations

Engineering Contradiction:
ImproveL2P table pointer accuracyVSAvoidcache management complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies merging by combining the LBA consecutiveness determination function into the existing DM module operations. Instead of adding a separate determination step, the patent integrates the consecutiveness check into the normal data processing flow of the DM module. The first flag bit is set during the existing cache entry generation and update process, thereby maintaining L2P table pointer accuracy while avoiding additional device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20260111145A1Method for Writing Data to a Solid State Disk, Apparatus, and Solid State Disk
Publication Date: 2026.04.23 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US20260111145A1 patent drawing
  • US20260111145A1 patent drawing
  • US20260111145A1 patent drawing

AI summary

Provided is a method for writing data to a Solid State Disk (SSD), an apparatus and the SSD. According to the method, a Logical Block Address (LBA) of each of a plurality of pieces of written data stored into a target cache module is acquired to obtain a plurality of Logical Block Addresses (LBAs); the plurality of pieces of written data in the buffer is stored into a solid-state storage unit of the SSD; whether the plurality of LBAs are consecutive is determined to obtain a determination result. In a case where the determination result indicates that the plurality of LBAs are consecutive, a Physics Block Address (PBA) of each of the plurality of pieces of written data in the solid-state storage unit is acquired to obtain a plurality of PBAs and a target mapping table according to the plurality of LBAs and the plurality of PBAs is generated.