Solid State Memory Write Parameter Adaptation for Read Error Reduction

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Solution Overview

Problem

Solid state memory longevity is affected by write operations, and existing technologies fail to effectively adjust write parameters to minimize read errors and prolong memory life.

Innovation Solution

A method is introduced to adjust verify threshold values based on correctable read error frequencies, using verified voltages to set optimal programming parameters for solid state memory, thereby reducing read errors and extending memory life.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If verify threshold value is set to minimize read errors, then read reliability is improved, but write operation complexity increases

Engineering Contradiction:
Improveread reliabilityVSAvoidwrite operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The verify threshold value is dynamically adjusted based on the aging state of the solid state memory. The controller monitors read error frequencies and automatically modifies the verify threshold to compensate for aging effects, transitioning from a static to a dynamic parameter that adapts to memory condition changes over time.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements a feedback mechanism where read error frequencies are monitored and used to adjust the verify threshold value. The controller receives feedback about memory performance degradation and automatically modifies write parameters to maintain optimal read reliability without manual intervention.

Inventive Principle:
Principle #23Feedback

2Duration of action of stationary object

If verify threshold value is adjusted dynamically, then memory longevity is improved, but control complexity increases

Engineering Contradiction:
Improvememory longevityVSAvoidcontrol complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The solid state memory controller performs self-adjustment by automatically monitoring its own aging state through read error detection and autonomously modifying its write parameters. The system serves itself by detecting performance degradation and correcting it without external intervention, extending its operational life through self-adaptation.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The controller uses feedback from monitored read error frequencies to automatically adjust verify threshold values. This closed-loop control system continuously adapts write parameters based on actual memory condition, enabling the memory to maintain optimal performance throughout its operational life without manual recalibration.

Inventive Principle:
Principle #23Feedback

3Reliability

If verify threshold value is optimized for read accuracy, then read error rate is reduced, but write performance may be affected

Engineering Contradiction:
Improveread accuracyVSAvoidwrite performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system changes the verify threshold parameter based on memory aging state to optimize read accuracy. By adjusting this critical parameter dynamically, the system maintains high read accuracy even as memory cells degrade, ensuring that read operations remain reliable throughout the memory's operational life.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The verify threshold is transformed from a static parameter to a dynamic one that adapts to memory condition. This dynamic adjustment allows the system to maintain optimal read accuracy without permanently increasing write operation complexity, as the changes are adaptive rather than structural.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10861556B2Method and system for adapting solid state memory write parameters to satisfy performance goals based on degree of read errors
Publication Date: 2020.12.08 EMC IP HLDG CO LLC
  • US10861556B2 patent drawing
  • US10861556B2 patent drawing
  • US10861556B2 patent drawing

AI summary

In general, embodiments of the technology relate to a method for adjusting solid state memory write parameters. The method includes obtaining a performance goal for the solid state memory, receiving a client write request for data from a client, where the client write request comprises a logical address and data to be written. The method further includes determining a physical address corresponding to the logical address, where the physical address comprises a page number for a physical page in the persistent storage, obtaining at least one verify threshold value using the performance goal, issuing a control module program request including the data to be written and the at least one verify threshold value to a storage module, where the storage module comprises the physical page, and programming the data into the physical page of the storage module using the at least one verify threshold value.