3D Memory SSG Cut Layout for Short-Circuit-Resistant String Control
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Solution Overview
Problem
Existing 3D memory devices face complexity in designing and forming Bilateral Source-Select-Gate (BSG) cut structures, leading to challenging layout and increased susceptibility to short circuits, especially as the number of memory strings increases, impairing product yield.
Innovation Solution
The introduction of Source-Select-Gate (SSG) cut structures that separate the landing area for word line contacts connected to bridge structures from those connected to staircases, simplifying the layout and reducing the number of divisions, allowing for more flexible formation of conductive contacts and reducing the complexity of string control in 3D memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If Bilateral Source-Select-Gate (BSG) cut structures are used to control memory strings in 3D memory devices, then string control capability is improved, but layout complexity increases and susceptibility to short circuits increases
Solution Approach 1:
The BSG cut structure is segmented into multiple portions (first portion, second portion, third portion) that are selectively positioned relative to staircases and memory strings. This segmentation allows different regions to serve different control functions, enabling versatile string control while maintaining simplified layout through modular arrangement.
Solution Approach 2:
The patent introduces a vertical dimension to the cut structure by positioning different portions at different vertical levels relative to staircases and memory strings. The first portion is positioned above a first staircase, the second portion above a second staircase, and the third portion between staircases, creating a three-dimensional control architecture that enhances functionality without increasing lateral layout complexity.
2Quantity of substance
If the number of memory strings is increased to improve memory density, then memory capacity is improved, but susceptibility to short circuits increases and product yield deteriorates
Solution Approach 1:
The memory array is segmented into multiple independent regions controlled by different portions of the BSG cut structure. The first portion controls memory strings in a first region, the second portion controls memory strings in a second region, and the third portion controls memory strings in a third region. This segmentation isolates potential short circuit failures to specific regions, preventing propagation across the entire array and maintaining high yield even with increased string count.
Solution Approach 2:
The BSG cut structure acts as an intermediary control element between the source-select gate and the memory strings. By positioning different portions of the cut structure at different vertical levels and locations, it provides intermediate control stages that reduce direct interference between adjacent memory strings, thereby reducing short circuit susceptibility while enabling higher density.
3Adaptability or versatility
If BSG cut structures are used to control memory strings, then string control capability is improved, but formation complexity of word line contacts increases
Solution Approach 1:
The patent utilizes vertical positioning of different BSG cut structure portions to simplify word line contact formation. The first portion is positioned above a first staircase at a first vertical level, the second portion above a second staircase at a second vertical level, and the third portion between staircases at a third vertical level. This vertical stratification allows word line contacts to be formed at different elevation planes, reducing lateral overlap and simplifying the manufacturing process.
Data Source
AI summary
A 3D memory device includes a memory stack including a memory block. The memory block includes a first memory array structure, a staircase structure, a second memory array structure in a first lateral direction, and a plurality of strings in a second lateral direction. The staircase structure includes a staircase zone and a bridge structure adjacent to the staircase zone. The 3D memory device also includes a SSG cut structure. The SSG cut structure includes a first portion between a first string and a second string and extends in the bridge structure in the first lateral direction. The staircase zone includes a first staircase conductively connected to first memory cells in the first string through the bridge structure and a second staircase conductively connected to second memory cells in the second string in the first memory array structure through the bridge structure.