Integrated SSG Controllers Direct NVMe Data Transfer
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Solution Overview
Problem
Graphics subsystems face increased traffic and congestion due to the need for data transfer from non-volatile memory to a graphics processing unit (GPU) via a host computing system's root complex, which taxes the root complex and increases data transfer complexity.
Innovation Solution
A system on a chip (SoC) with integrated solid state graphics (SSG) controllers, including a GPU, non-volatile memory controller, and NVMe controller, which allows direct communication between local memory and non-volatile memory, reducing the need for intermediate host memory transfers and alleviating root complex load.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transferred from non-volatile memory to GPU local memory via host memory and root complex, then data transfer can be performed, but traffic and congestion increase and root complex is taxed
Solution Approach 1:
The patent integrates the NVMe controller and GPU memory interface directly into the GPU device, merging previously separate components (host system root complex, host memory, and GPU local memory) into a unified architecture where data can transfer directly between non-volatile memory and GPU local memory without passing through the host system's root complex and memory, thereby eliminating traffic congestion and reducing device complexity
Solution Approach 2:
The patent extracts the memory interface functionality from the host system's root complex and embeds it directly into the GPU device, allowing the GPU to independently manage its own memory operations and data transfers without relying on the host system's memory subsystem, thus reducing the tax on the root complex and eliminating traffic congestion
2Productivity
If integrated SSG controllers are implemented, then data transfer efficiency increases and root complex burden decreases, but device integration complexity increases
Solution Approach 1:
The patent implements a universal memory interface within the GPU device that can handle multiple types of memory operations (NVMe storage access, local GPU memory management, and direct memory-to-memory transfers) through a single integrated controller architecture, thereby achieving multi-functionality that improves data transfer efficiency while managing integration complexity through standardized interfaces
Data Source
AI summary
Described is a solid state graphics (SSG) subsystem including a die and a package, where the die includes a memory hub, graphics processing unit(s) (GPU(s)) connected to the memory hub, first memory architecture controller(s) connected to the memory hub and directly controlling access to first memory architecture(s), second memory architecture controller associated with each GPU and each second memory architecture controller connected to the memory hub and second memory architecture(s), an expansion bus first memory architecture controller connected to the memory hub and being an endpoint for a host system and an expansion bus controller coupled to the expansion bus first memory architecture controller and capable of connecting to the host system. The first memory architecture(s) and the second memory architecture(s) are either located on the SSG subsystem, located on the package, or a combination thereof.