SSPC Gate Drive Control for Parallel Current Sharing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The implementation of solid state power controllers (SSPCs) in parallel configurations for high voltage applications in aircraft primary distribution systems faces challenges due to imperfect current sharing among SSPCs, caused by manufacturing tolerances and varying PCB resistances, resulting in lower than expected current ratings.

Innovation Solution

A control circuit with an ON-Resistance control mechanism that adjusts the gate drive voltage of solid state switching devices to achieve equal ON-Resistance values across multiple SSPCs, ensuring precise current sharing and minimizing power dissipation, using a feedback loop and load current limiting mechanisms to regulate the ON-Resistance and limit load currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple SSPCs are connected in parallel to achieve higher current ratings, then the current handling capability is improved, but the current sharing among SSPCs becomes imperfect due to manufacturing tolerances and PCB resistance variations

Engineering Contradiction:
Improvecurrent ratingVSAvoidcurrent sharing
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the gate drive voltage of each solid state switching device based on its individual characteristics. The control circuit modifies the gate voltage parameter to compensate for manufacturing tolerances and PCB resistance variations, ensuring equal current sharing among parallel-connected SSPCs. This allows the system to achieve the desired higher current rating while maintaining precise current distribution.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If the gate drive voltage is increased to reduce switch resistance and improve current sharing, then the current sharing is improved, but the power dissipation in the switching devices increases

Engineering Contradiction:
Improvecurrent sharingVSAvoidpower dissipation
Core Design Contradiction:
Manufacturing precisionVSLoss of energy

Solution Approach 1:

The patent implements feedback control by continuously monitoring the current through each solid state switching device and adjusting the gate drive voltage accordingly. The control circuit uses feedback signals from current sensors to dynamically optimize the gate voltage, achieving precise current sharing while minimizing power dissipation. This closed-loop control ensures that the gate voltage is increased only to the extent necessary for equal current distribution, avoiding excessive power losses.

Inventive Principle:
Principle #23Feedback

3Manufacturing precision

If a controlled current source is used to drive the gate control circuit for each MOSFET, then the current sharing is improved, but the device complexity and number of components increase

Engineering Contradiction:
Improvecurrent sharingVSAvoidcontrol circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple control functions into a single integrated control circuit that manages all parallel-connected solid state switching devices. Instead of using separate controlled current sources for each MOSFET, the invention combines current sensing, gate drive voltage generation, and adjustment functions into one unified control unit. This integration maintains precise current sharing capability while significantly reducing the overall device complexity and component count.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables almost perfect current sharing among SSPCs connected in parallel, achieving higher current ratings without additional components and reducing power losses, while maintaining reliability and flexibility in aerospace power distribution systems.

Implementation Method 1

A control circuit or gate drive circuit is configured to apply a drive voltage to a control terminal of a solid state switching device. The solid state switching device switches, according to the drive voltage applied to the control terminal, between an OFF operation mode and an ON operation mode

Methodology Applied
Scientific EffectField Effect Transistor Gate Control:

Implementation Method 2

the control circuit is configured to adjust the drive voltage during the ON operation mode according to a load current in the load circuit and/or according to a current between the first terminal and the second terminal of the solid state switching device in the ON operation mode

Methodology Applied
Scientific EffectElectrical Resistance Measurement: Electrical Resistance

Data Source

PatentEP3046257B1Control circuit for solid state power controller
Publication Date: 2018.12.05 HS ELEKTRONIK SYST
  • EP3046257B1 patent drawingFigure 1~2
  • EP3046257B1 patent drawingFigure 3

AI summary

A control circuit is configured to apply a drive voltage to a solid state switching device (130) comprising a first terminal (D), a second terminal (S) and a control terminal (G), the solid state switching device (130) configured to switch, according to the drive voltage applied to the control terminal (G), between an OFF operation mode in which the second terminal (S) is electrically disconnected from an electrical supply voltage applied to the first terminal (D), and an ON operation mode in which the second terminal (S) is electrically connected to the electrical supply voltage applied to the first terminal (D) such as to connect a load circuit (116) to the electrical supply voltage, wherein the control circuit is configured to adjust the drive voltage during the ON operation mode according to a load current in the load circuit (116) and/or according to a current between the first terminal (D) and the second terminal (S) of the solid state switching device (130) in the ON operation mode.