Solid-State Relay Circuitry with Clamping Diodes for High Voltage

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Solution Overview

Problem

Existing solid-state relay (SSR) circuitry faces challenges in safely handling high voltages, leading to increased size and cost, and requires complex timing for zero-voltage switching to prevent arcing in AC systems.

Innovation Solution

The use of a composite SSR circuitry comprising a field-effect transistor (FET) stack and clamping diodes, with a single instance of gate driver circuitry, allows for active clamping and efficient switching, reducing voltage stress across FETs and enabling reliable operation at higher voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If mechanical or electro-mechanical relay components are used to control power supply, then the relay circuitry can effectively control power flow, but the size and cost increase due to the mechanical components

Engineering Contradiction:

Improvepower control reliabilityVSAvoidrelay circuitry size

Core Design Contradiction:

ReliabilityVSWeight of stationary object

Solution Approach 1:

The patent replaces mechanical relay components with solid-state field-effect transistors (FETs) that function as electronic switches. The FET stack circuitry uses electrical fields to control power flow instead of mechanical moving parts, eliminating the size and cost associated with mechanical components while maintaining reliable power control capability.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Weight of stationary object

If solid-state relay circuitry is used to reduce size and cost, then the relay circuitry becomes more compact and affordable, but it requires complex timing for zero-voltage switching to prevent arcing

Engineering Contradiction:

Improverelay circuitry sizeVSAvoidswitching timing complexity

Core Design Contradiction:

Weight of stationary objectVSDevice complexity

Solution Approach 1:

The patent introduces clamping diodes as intermediary components connected in parallel with the FET stack. These diodes provide a passive path for current during switching transitions, automatically preventing voltage spikes and arcing without requiring complex timing control circuitry. The diodes act as mediators that simplify the switching control requirements.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The clamping diodes are positioned to provide protective action before voltage spikes can cause damage. By being pre-configured in parallel with the FET stack, they immediately clamp excessive voltages during switching events, cushioning the circuit against harmful transients without requiring active timing control.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Power

If solid-state relay circuitry is used to handle high voltages, then the circuitry can operate at higher voltages, but the voltage stress across FETs increases requiring larger components

Engineering Contradiction:

Improvevoltage handling capabilityVSAvoidFET component size

Core Design Contradiction:

PowerVSWeight of stationary object

Solution Approach 1:

The patent divides the high-voltage blocking function into multiple segments by stacking several FETs in series. Each FET in the stack handles only a portion of the total voltage (e.g., 600V per FET for a 3000V system), allowing the use of smaller, lower-voltage-rated components instead of one large high-voltage FET. The clamping diodes further segment the voltage stress during switching events.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables SSR circuitry to handle high voltages efficiently, reducing size and cost while eliminating the need for complex timing, thereby enhancing reliability and performance.

Implementation Method 1

allows for active clamping and efficient switching, reducing voltage stress across FETs

Methodology Applied

Scientific EffectVoltage clamping:

Implementation Method 2

a diode having a first terminal and a second terminal, the first terminal of the diode coupled to the control terminal of the first transistor and the control terminal of the second transistor

Methodology Applied

Scientific EffectDiode rectification: Diode

Data Source

PatentUS20240340005A1Methods and apparatus to drive solid-state relay circuitry

Publication Date: 2024.10.10 TEXAS INSTRUMENTS INC

AI summary

An example apparatus includes: a first transistor having a first terminal and a control terminal; a second transistor having a first terminal and a control terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor, the control terminal of the second transistor coupled to the control terminal of the first transistor; a resistor having a first terminal and a second terminal, the first terminal of the resistor coupled to the first terminal of the first transistor and the first terminal of the second transistor, the second terminal of the resistor coupled to the control terminal of the first transistor and the control terminal of the second transistor; and a diode having a first terminal and a second terminal, the first terminal of the diode coupled to the control terminal of the first transistor and the control terminal of the second transistor.