Semiconductor Test Sample Prep for Clear SSRM Doping Imaging

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Solution Overview

Problem

Existing imaging technologies like scanning spreading resistance microscopy (SSRM) face challenges in accurately imaging ion implantation regions due to the high conductivity of metal conductors, which obscure the contrast of semiconductor doped regions.

Innovation Solution

A method involving selective removal of conductive materials from the conductive interconnection layer and replacing them with an insulating sacrificial layer, such as inorganic matter, to create a semiconductor test sample that enhances the visibility of ion implantation regions during SSRM testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal conductors are used in the conductive interconnection layer, then electrical conductivity is improved, but imaging contrast of ion implantation regions deteriorates due to obscuration by metal

Engineering Contradiction:
Improveelectrical conductivityVSAvoidimaging contrast
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent extracts and removes the metal conductor from the conductive interconnection layer to eliminate its harmful effect on imaging contrast. The method selectively removes metal materials (such as tungsten) from the conductive interconnection layer, replacing them with insulating sacrificial layers, thereby allowing clear imaging of ion implantation regions without metal obscuration while preserving the original device structure for electrical functionality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an insulating sacrificial layer as an intermediary material to replace the metal conductor. This sacrificial layer serves as a placeholder that maintains the structural integrity and electrical connectivity of the device during testing, while being transparent to the imaging process. After imaging, the sacrificial layer can be removed and the original metal conductor restored

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If metal conductors are removed from the conductive interconnection layer, then imaging contrast is improved, but electrical conductivity deteriorates

Engineering Contradiction:
Improveimaging contrastVSAvoidelectrical conductivity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent performs preliminary removal of metal conductors before the imaging process to ensure optimal imaging contrast from the outset. By removing the metal conductors in advance and replacing them with insulating sacrificial layers, the imaging process can proceed without any metal-induced contrast degradation, while the device structure remains intact for subsequent electrical testing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent temporarily discards the metal conductor during the imaging phase by removing it and replacing it with an insulating sacrificial layer. After the imaging process is complete, the sacrificial layer is removed and the metal conductor is recovered and restored to its original position, thereby recovering the electrical conductivity function while having achieved the imaging objective

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS12368051B2Semiconductor test sample and manufacturing method thereof
Publication Date: 2025.07.22 CHANGXIN MEMORY TECH INC
  • US12368051B2 patent drawing
  • US12368051B2 patent drawing
  • US12368051B2 patent drawing

AI summary

A method of manufacturing a semiconductor test sample includes: providing a product to be analyzed, the product comprises a conductive interconnection layer and a semiconductor doped region located below the conductive interconnection layer; selectively removing a conductive material from the conductive interconnection layer, replacing the conductive material with a non-conductive material and replacing the conductive interconnection layer with an insulating sacrificial layer; and taking the product including both the insulating sacrificial layer and the semiconductor doped region as a semiconductor test sample.