Stack Capacitor Fabrication via Atomic Layer Deposition
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices achieve higher integration densities, the horizontal area of memory cells decreases, leading to reduced cell capacitance, which can result in unsatisfactory operation at low voltages, and it becomes challenging to deposit a uniform, high-quality, high dielectric constant dielectric layer on high aspect ratio features like cylinder type lower electrodes.
Innovation Solution
A method of fabricating capacitors using atomic layer deposition, where a pre-process operation involving plasma nitridization and sequential injection of source and oxidizer gases, including ozone, is performed to form a reliable high k dielectric layer on lower electrodes, improving layer quality and step coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the thickness of dielectric layer is reduced or surface area of capacitor is increased to increase cell capacitance, then cell capacitance is improved, but the sense margin during reading or writing decreases and the semiconductor device cannot operate satisfactorily at low voltage
Solution Approach 1:
The patent changes the dielectric constant parameter by introducing a high-k dielectric layer (such as hafnium oxide, zirconium oxide, or tantalum oxide) with k>10, replacing conventional low-k dielectric materials. This parameter change enables increased cell capacitance while maintaining adequate voltage operation margins, as the higher dielectric constant provides greater capacitance density without requiring extreme thickness reduction or area expansion
2Quantity of substance
If a cylinder type capacitor with 3D shape lower electrode is used to increase surface area, then cell capacitance is improved, but it becomes difficult to deposit a uniform, high quality, high k dielectric layer with acceptable step coverage
Solution Approach 1:
The patent applies a pre-treatment process to the lower electrode surface before depositing the high-k dielectric layer. This preliminary action involves surface cleaning, plasma treatment, or chemical modification to enhance surface uniformity and reactivity, ensuring that the subsequent dielectric deposition achieves uniform thickness and high quality even on high aspect ratio cylinder structures
Solution Approach 2:
The patent replaces conventional physical vapor deposition methods with chemical vapor deposition or atomic layer deposition techniques. These chemical deposition methods use precursor gases that react chemically with the substrate surface, enabling conformal and uniform dielectric layer formation on complex 3D cylinder structures with high step coverage, overcoming the limitations of mechanical/physical deposition approaches
3Area of stationary object
If integration density is increased to decrease horizontal cell area, then device integration is improved, but cell capacitance decreases leading to unsatisfactory operation at low voltage
Solution Approach 1:
The patent transitions from planar 2D capacitor structures to 3D stack-type capacitor structures with vertical extension. By utilizing the vertical dimension through high aspect ratio cylinder structures and multi-layer stacking, the capacitor achieves increased capacitance within a reduced horizontal footprint, enabling higher integration density without sacrificing cell capacitance
Solution Approach 2:
The patent employs composite material structures combining multiple materials with complementary properties: conductive materials for electrodes (such as tungsten, cobalt, or doped polysilicon), high-k dielectric materials (such as hafnium oxide, zirconium oxide, or tantalum oxide), and barrier/adhesion layers. This composite approach optimizes both capacitance density and structural integrity in high aspect ratio stack configurations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of a uniform, high-quality dielectric layer with improved step coverage on high aspect ratio features, enhancing cell capacitance and reducing leakage current, thus ensuring satisfactory operation at low voltages.
Implementation Method 1
a plasma nitridization process may be performed on the surface of the lower electrode
Implementation Method 2
The pre-process operation may be performed by injecting the ozone gas into a chamber including the semiconductor substrate
Implementation Method 3
The performing of the pre-process operation and the forming of the dielectric layer are performed in one device for performing a method of atomic layer deposition
Data Source
AI summary
Provided are methods of fabricating capacitors of semiconductor devices, the methods including: forming a lower electrode on a semiconductor substrate, performing a pre-process operation on the lower electrode for suppressing deterioration of the lower electrode during a process, forming a dielectric layer on the lower electrode using a source gas and an ozone gas, and forming an upper electrode on the dielectric layer, wherein the pre-process operation and the forming of the dielectric layer may be performed in one device capable of atomic layer deposition.