Stack Capacitor Volumetric Efficiency via Planar Anode Segmentation
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Solution Overview
Problem
Solid electrolytic capacitors have reached a plateau in increasing capacitance per volume without significant parasitic effects, limiting further miniaturization and functionality in electronic devices.
Innovation Solution
A solid electrolytic capacitor design featuring planar anodes with spacers between adjacent dielectrics, allowing for a conductive material to fill interstitial spaces, eliminating the need for conductive carbon and metal layers between dielectrics, and using a matrix with a binder and spacer to facilitate the formation of a conductive layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional stacked layer capacitor design is used, then manufacturing process is simple, but capacitance per volume reaches a plateau and cannot be significantly increased
Solution Approach 1:
The capacitor is divided into multiple planar anodes stacked in parallel arrangement, with each anode having separated ends that allow direct electrical contact between adjacent anodes. This segmentation enables increased capacitance density while maintaining manufacturability through standard procedures.
Solution Approach 2:
The invention transitions from traditional planar stacked layers to a three-dimensional parallel arrangement of planar anodes with separated ends. This dimensional change allows conductive material to fill interstitial spaces between dielectrics, significantly increasing capacitance per volume while enabling further miniaturization.
2Volume of stationary object
If capacitor size is decreased to minimize overall device size, then electronic device miniaturization is achieved, but functionality and capacitance are reduced
Solution Approach 1:
The capacitor structure incorporates interstitial spaces between adjacent dielectrics that are filled with conductive material. This porous-like structure increases the effective capacitance within a reduced volume, allowing both miniaturization and maintained functionality.
Solution Approach 2:
The planar anodes are arranged in a nested parallel configuration where multiple anodes are stacked with direct electrical contact at separated ends, maximizing the use of available space and increasing capacitance density within a compact volume.
3Reliability
If multiple conductive carbon and metal layers are placed between adjacent dielectrics, then electrical conductivity is improved, but capacitor thickness and overall size increase
Solution Approach 1:
Multiple conductive layers (carbon and metal) are merged into a single integrated conductive material layer that fills the interstitial spaces between dielectrics. This consolidation maintains electrical conductivity while reducing overall capacitor thickness and eliminating redundant layers.
Solution Approach 2:
The invention extracts and eliminates the need for separate conductive carbon and metal layers between dielectrics, replacing them with a single conductive material filling the interstitial spaces. This removal of redundant components reduces thickness while maintaining conductivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves significant capacitance per volume gains, enabling further miniaturization and increased volumetric efficiency while reducing the thickness of the capacitor stack, thus enhancing the miniaturization of electronic devices.
Implementation Method 1
The interstitial spaces comprise a conductive material, 18, which is in direct physical and electrical contact with adjacent dielectrics.
Implementation Method 2
Spacers, 16, which will be described in more detail herein, provide a separation between adjacent dielectric layers
Data Source
AI summary
An improved capacitor and method of making an improved capacitor is set forth. The capacitor has planer anodes with each anode comprising a fusion end and a separated end and the anodes are in parallel arrangement with each anode in direct electrical contact with all adjacent anodes at the fusion end. A dielectric is on the said separated end of each anode wherein the dielectric covers at least an active area of the capacitor. Spacers separate adjacent dielectrics and the interstitial space between the adjacent dielectrics and spacers has a conductive material in therein.


