Stack Head Register Speculative Return Address Prediction
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Solution Overview
Problem
Pipelined processors face inefficiencies due to the challenge of predicting target addresses for control transfer instructions like CALL and RETURN, leading to pipeline bubbles and increased power consumption from frequent accesses to the call return stack.
Innovation Solution
Implementing a stack head register and a last-in-first-out (LIFO) call return stack, where the stack head register stores a speculative return address that can be used if a return instruction is detected, reducing the need for dual ports and minimizing unnecessary stack accesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the call return stack is accessed on every instruction fetch to speculate return addresses, then pipeline bubbles are reduced and instruction throughput is improved, but power consumption increases
Solution Approach 1:
The patent performs preliminary action by speculatively updating the call return stack during the instruction fetch stage, before the return instruction is actually decoded. The fetch unit predicts that the current instruction might be a return instruction and preemptively pops a return address from the stack, allowing the pipeline to continue fetching instructions without stalls. This preliminary speculative action eliminates pipeline bubbles while avoiding the need for frequent actual stack accesses during decode and execution stages.
2Measurement precision
If the call return stack is accessed on every instruction fetch, then return address prediction accuracy is improved, but the device complexity increases due to dual ports being required
Solution Approach 1:
The fetch unit performs preliminary speculative pops from the call return stack based on prediction logic, maintaining high return address prediction accuracy. This approach requires only a single read port on the call return stack because the speculative access occurs during the fetch stage when the stack is naturally readable, eliminating the need for a separate write port that would be required if actual returns were handled during the same cycle.
3Loss of time
If speculative reads are performed on the call return stack every fetch cycle, then pipeline stalls are reduced, but unnecessary stack accesses increase power consumption
Solution Approach 1:
The patent extracts the speculative return address prediction functionality from the main call return stack access path and implements it in the fetch unit using a separate prediction mechanism. The fetch unit maintains its own speculative return address counter that is updated independently of the main call return stack, allowing speculative predictions to be made without actually accessing the stack memory for every fetch cycle. Actual stack accesses are minimized to only when predictions are confirmed.
4Adaptability or versatility
If the call return stack uses two ports for read and write operations, then concurrent access capability is improved, but the area occupied by the stack increases
Solution Approach 1:
The fetch unit performs preliminary speculative pops from the call return stack during the fetch stage, which is naturally a read operation. This timing coincides with when the stack is already being accessed for branch prediction purposes, so no additional write port is needed. The speculative return address is captured and held in the fetch unit's internal logic, allowing the stack to use a single port that alternates between read and write operations without losing concurrent access capability.
Data Source
AI summary
A processor, method, and medium for implementing a call return stack within a pipelined processor. A stack head register is used to store a copy of the top entry of the call return stack, and the stack head register is accessed by the instruction fetch unit on each fetch cycle. If a fetched instruction is decoded as a return instruction, the speculatively read address from the static register is utilized as a target address to fetch subsequent instructions and the address at the second entry from the top of the call return stack is written to the stack head register.