Stack Memory Packet Interface for High-Speed Multi-Channel Routing
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Solution Overview
Problem
Existing stack memory systems face challenges in achieving high-speed data transmission and efficient communication due to the design limitations of their physical interfaces, particularly in high bandwidth memory (HBM) systems.
Innovation Solution
The implementation of a stack memory device with a physical layer, selector, and control layer that utilize packet-based communication, including a transmission/reception circuit, serialization/parallelization circuit, and core control circuit, to manage write and read operations, enhancing scalability and speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a parallel data bus is used for communication, then data transmission speed is improved, but device complexity and layout area increase
Solution Approach 1:
The patent segments the communication interface into separate functional layers: a physical layer for signal transmission and a control layer for command processing. This segmentation allows the physical layer to use simple serial communication while the control layer handles complex operations, resolving the contradiction between transmission speed and interface complexity.
Solution Approach 2:
The patent transitions from a traditional parallel bus architecture to a serial communication architecture with multiple channels. By adding the channel selection dimension and layering (physical/control layers), the system achieves high-speed transmission without requiring complex parallel bus routing, thus reducing layout area and device complexity.
2Adaptability or versatility
If multiple channels are added for communication, then adaptability and versatility are improved, but device complexity increases
Solution Approach 1:
The patent implements a universal control layer that can manage multiple channels through a single interface. The control layer receives channel selection signals and routes commands appropriately, allowing one control layer to serve multiple channels. This multi-functionality approach provides channel versatility without proportionally increasing control complexity.
Solution Approach 2:
The channel selection signal acts as an intermediary that mediates between the physical layer and the control layer. It enables dynamic channel switching without requiring complex routing logic in the control layer, thus improving adaptability while keeping device complexity manageable.
3Area of stationary object
If layout area is reduced, then manufacturing cost is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the memory device into distinct layers (base chip with physical layer, core chip with control layer) connected through TSVs. This segmentation allows each layer to be optimized independently for area efficiency while maintaining standardized TSV interfaces, reducing overall layout area without excessively increasing precision requirements.
Solution Approach 2:
The patent moves from planar parallel bus routing to a three-dimensional stacked architecture with vertical TSV connections. This dimensional change dramatically reduces the horizontal layout area while the TSV alignment requirements are managed through standardized processes, achieving area reduction without prohibitive precision increases.
Data Source
AI summary
A stack memory device includes a physical layer configured to receive write data, a write valid signal, and a transmission write clock signal from an external device and transmit read data, a read valid signal, and a transmission read clock signal to the external device, a selector configured to output a signal output from the physical layer through a first channel or a second channel, based on a channel selection signal, and a control layer configured to receive an output signal of the selector through the first channel or the second channel to generate a control command and an address for controlling a write operation or a read operation within a core chip.