Stack Memory Read Strobing with Shared ADQS Across Pseudo Channels
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Solution Overview
Problem
Existing stack memory systems face challenges in optimizing data transfer efficiency and reducing the number of through-vias required for data strobing signals in high bandwidth memory (HBM) devices.
Innovation Solution
The implementation of a base chip that generates flags and alignment data strobing signals in synchronization with clock and control signals to control read operations on pseudo channels, allowing shared use of these signals across multiple memory chips, thereby reducing the need for through-vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate data strobing signals are generated for each pseudo channel, then data output precision is improved, but device complexity increases
Solution Approach 1:
The patent merges the data strobing signal generation for multiple pseudo channels into a single shared signal (ADQS) that is commonly used by both first and second pseudo channels. This consolidation reduces the number of separate signal generation circuits needed, thereby decreasing device complexity while maintaining precise data output through proper synchronization with read flags (RD_F1, RD_F2) for each channel.
Solution Approach 2:
The alignment data strobing signal (ADQS) is designed to serve multiple functions across different pseudo channels simultaneously. A single ADQS signal is universally applied to both first and second pseudo channels, allowing the same signal infrastructure to support multiple data output paths without requiring dedicated strobing signals for each channel, thus reducing overall system complexity.
2Reliability
If more through-vias are used to transmit signals between base chip and memory chips, then signal transmission reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent merges multiple signal transmission paths into fewer through-vias by having both first and second pseudo channels share common data strobing signal lines (ADQS) and control signal lines. Instead of dedicating separate through-vias for each channel's strobing signals, the same physical via structures are reused across channels, reducing the total number of through-vias required and simplifying the manufacturing process while maintaining reliable signal transmission.
3Speed
If data strobing signals are generated independently for each memory chip, then data transfer speed is improved, but energy consumption increases
Solution Approach 1:
The patent merges the data strobing signal generation function into a centralized operation control circuit on the base chip that produces a single ADQS signal shared by multiple pseudo channels and memory chips. This eliminates the need for each memory chip to independently generate its own strobing signals, reducing redundant energy consumption while maintaining high data transfer speeds through efficient centralized signal distribution and synchronization.
Data Source
AI summary
A memory device includes a base chip configured to generate a first read flag, a second read flag, and a plurality of alignment data strobing signals, responsive to a clock signal and a control signal, and a memory chip configured to output data stored in a first pseudo channel included in a memory core as pipe data, responsive to the first read flag and the alignment data strobing signals, and output data stored in a second pseudo channel included in the memory core as the pipe data, responsive to the second read flag and the alignment data strobing signals.