Stack Packages With Bridge Dies For Isolated Electric Paths

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor packages face challenges in achieving high density and high-speed operation while maintaining a small form factor, particularly in realizing reduced thickness, due to limitations in chip stack technology and wafer-level chip stack package development.

Innovation Solution

The proposed solution involves a stack package configuration with multiple sub-packages, each comprising bridge dies and semiconductor dies spaced apart, connected by vertical interconnectors and redistribution lines, allowing for vertical stacking and electrical isolation to create separate electric paths, thereby enabling efficient data transmission and increased memory capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple semiconductor dies are vertically stacked to increase memory capacity and bandwidth, then the memory capacity and operating speed are improved, but the package thickness increases

Engineering Contradiction:
Improvememory capacityVSAvoidpackage thickness
Core Design Contradiction:
Quantity of substanceVSLength of stationary object

Solution Approach 1:

The patent transitions from planar arrangement to three-dimensional vertical stacking of multiple sub-packages, each containing bridge dies and semiconductor dies arranged in multiple layers. This dimensional change allows increased memory capacity within a smaller footprint while managing thickness through optimized vertical interconnection structures including through-silicon vias and redistribution layers that enable compact signal routing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If bridge dies are used to provide separate electric paths for data transmission, then signal noise is reduced and bandwidth is improved, but the device complexity increases

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the package into multiple sub-packages, each containing bridge dies that act as independent intermediate connection structures. These bridge dies create separate electric paths for data transmission between stacked semiconductor dies, isolating signal routes to reduce noise and crosstalk. The segmentation allows complex high-speed signaling to be divided into manageable independent channels while maintaining overall system reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bridge dies serve as intermediary structures between stacked semiconductor dies, providing dedicated vertical interconnectors and redistribution lines that mediate data transmission. These intermediary bridge dies enable separate electric paths without requiring direct complex interconnections between all semiconductor die pairs, simplifying the overall interconnection architecture while maintaining signal integrity through isolated transmission channels.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If vertical interconnectors are densely packed to increase I/O capacity, then bandwidth is improved, but manufacturing precision requirements increase

Engineering Contradiction:
ImprovebandwidthVSAvoidinterconnector alignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent employs preliminary alignment structures including alignment marks and standardized via patterns formed during the semiconductor fabrication process. The bridge dies and semiconductor dies are prepared with pre-defined interconnector locations and redistribution layer patterns before stacking. This preliminary action ensures that when sub-packages are vertically stacked, the through-silicon vias and interconnectors align precisely without requiring ultra-precise manual positioning, thereby enabling dense I/O packaging while maintaining manufacturability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10985106B2Stack packages including bridge dies
Publication Date: 2021.04.20 SK HYNIX INC
  • US10985106B2 patent drawing
  • US10985106B2 patent drawing
  • US10985106B2 patent drawing

AI summary

A stack package includes a plurality of sub-packages vertically stacked. Each of the sub-packages includes a bridge die having a plurality of vertical interconnectors and a semiconductor die. A first group of vertical interconnectors disposed in a first bridge die included in a first sub-package of the sub-packages and other vertical interconnectors connected to the first group of vertical interconnectors constitute a first electric path, and a second group of vertical interconnectors disposed in a second bridge die included in a second sub-package of the sub-packages and other vertical interconnectors connected to the second group of vertical interconnectors constitute a second electric path. The first and second electric paths are electrically isolated from each other and disposed to provide two separate electric paths.