Stack Via Wiring Structure for Fine-Pitch Semiconductor Packaging
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Solution Overview
Problem
Existing stack via technologies in semiconductor packaging face limitations in via size due to laser processing constraints, leading to potential misalignment and complexity in the manufacturing process.
Innovation Solution
A wiring structure is proposed that includes a via integrally penetrating multiple insulating layers, connecting via pads of different diameters, and simplifying the manufacturing process by allowing for finer pitch wiring and improved alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If laser processing is used to form via holes, then via holes can be formed through insulating layers, but the via size is limited and fine pitch implementation is difficult
Solution Approach 1:
The patent divides the via formation process into two independent stages: first forming via holes through laser processing, then forming separate via pads through plating. This segmentation allows the via hole size to be determined by laser capability while the via pad size can be independently controlled to achieve fine pitch, resolving the contradiction between manufacturing precision and ease of manufacture.
Solution Approach 2:
The patent performs preliminary action by forming via holes through laser processing before forming the via pads. The via holes are prepared in advance with appropriate positioning, and then the via pads are formed around them through plating. This preliminary formation of via holes enables subsequent precise control of via pad dimensions to achieve fine pitch wiring.
2Reliability
If via holes are formed through laser processing, then vias can be created, but misalignment between via holes and via pads occurs due to eccentricity
Solution Approach 1:
The patent introduces an intermediary structure - the via pad - that mediates between the laser-formed via hole and the final via. The via pad is formed with a larger diameter than the via hole and serves as a positioning reference and compensation structure. This intermediary allows misalignment to be absorbed and ensures reliable via formation even when eccentricity occurs during laser processing.
Solution Approach 2:
The patent applies beforehand cushioning by designing the via pad with a larger diameter than the via hole, creating a margin of error that cushions against potential misalignment. This dimensional buffer is built into the structure in advance, ensuring that even if eccentricity occurs during laser processing, the via will still form correctly within the via pad boundaries.
3Reliability
If vias are formed in each layer separately, then stack vias can be created, but the manufacturing process becomes complicated
Solution Approach 1:
The patent merges the via formation operations for multiple layers into a single integrated process. Instead of separately forming and aligning via holes in each insulating layer, the method forms a continuous via structure that penetrates through multiple insulating layers in one operation, then forms via pads around it. This merging significantly reduces process complexity while maintaining reliable stack via connection.
Solution Approach 2:
The via pad structure serves multiple functions simultaneously: it acts as a connection element between wiring layers, a positioning reference for alignment, a compensation structure for eccentricity, and a template for via formation. This multi-functionality reduces the need for separate structures and processes, thereby simplifying the overall manufacturing process while ensuring reliable stack via connection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the implementation of fine pitch wiring, increases the degree of freedom in wiring design, improves alignment between vias and via pads, and simplifies the manufacturing process.
Implementation Method 1
filling the via hole with plating
Data Source
AI summary
A wiring structure may include a first wiring layer including a first via pad, a first insulating layer covering the first wiring layer, a second wiring layer on the first insulating layer and including a second via pad defining a hole, a second insulating layer on the first insulating layer and covering the second wiring layer, a third wiring layer on the second insulating layer and including a third via pad, and a via integrally penetrating the first insulating layer and the second insulating layer, filling the hole of the second via pad, and connecting the first via pad, the second via pad, and the third via pad to each other, wherein the first insulating layer covers upper and side surfaces of the first via pad, and a diameter of the first via pad is smaller than diameters of the second via pad and the third via pad.


