Stackable IC Package with Recessed Interconnects
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Solution Overview
Problem
Current multi-chip packages face challenges in increasing integrated circuit density due to bulky designs, inefficient use of board space, and difficulties in testing individual die before assembly, leading to reliability issues and assembly inefficiencies.
Innovation Solution
A stackable integrated circuit package system is developed, featuring an external interconnect with non-recessed and recessed portions, a paddle for mounting the die, and an encapsulation that exposes the interconnects, providing mechanical support and improving adhesion to prevent delamination, while allowing for vertical stacking and efficient use of space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-chip packages use vertical stacking to increase integrated circuit density, then board space utilization improves, but package height increases and adhesion reliability deteriorates due to delamination at spacer and encapsulation interfaces
Solution Approach 1:
The patent removes the traditional spacer structure from the stacked package configuration. By eliminating the spacer, the source of delamination at the spacer-encapsulation interface is removed, thereby improving adhesion reliability while maintaining vertical stacking for high density
Solution Approach 2:
The patent implements package-in-package structure where one packaged integrated circuit is nested within another package. The outer package encapsulation directly contacts and adheres to the inner package substrate, creating a large bonded area that prevents delamination and improves reliability
2Device complexity
If conventional multi-chip modules are assembled before testing, then manufacturing complexity is reduced, but yield decreases because individual die cannot be identified as known-good-die before assembly
Solution Approach 1:
The patent enables testing of individual die before assembly into the stacked package. By allowing pre-assembly testing, known-good-die can be identified and selected, improving manufacturing yield without significantly increasing process complexity
3Ease of manufacture
If traditional encapsulation structures are used in stacked packages, then manufacturing simplicity is maintained, but height increases and adhesion becomes poor leading to delamination
Solution Approach 1:
The patent eliminates the traditional spacer structure from the encapsulation design. By removing the spacer, package height is reduced and the large encapsulation-substrate bonded area prevents delamination, improving adhesion reliability
Solution Approach 2:
The outer package encapsulation directly encloses the inner package substrate without intermediate spacers. This nested configuration reduces overall height while creating extensive bonded areas that prevent delamination at the package interfaces
Data Source
AI summary
A stackable integrated circuit package system is provided including forming an external interconnect having an interconnect non-recessed portion and an interconnect recessed portion, mounting an integrated circuit die over a paddle that is coplanar with the interconnect recessed portion, and forming an encapsulation having a recess over the external interconnect and the integrated circuit die with the external interconnect exposed at a side of the encapsulation.