Stackable IC Package Warpage Reduction via Recessed Substrate

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Solution Overview

Problem

Current integrated circuit packaging technologies face challenges in achieving smaller size, higher reliability, and cost-effectiveness due to issues with warpage, structural integrity, and manufacturing complexity in three-dimensional stacking, particularly in stacked chip packages.

Innovation Solution

A base substrate with stackable connections is used, where a base integrated circuit is attached and encapsulated with the connections partially exposed, allowing for easy stacking and mounting, and a bottom package is attached to form a stackable package with improved structural and electrical integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If three-dimensional package stacking is used to reduce size and increase integration density, then the number of circuits per unit area increases, but warpage occurs causing uneven mounting features and electrical connections

Engineering Contradiction:
Improveintegration densityVSAvoidwarpage
Core Design Contradiction:
Volume of moving objectVSStability of the object's composition

Solution Approach 1:

The patent divides the stacked package structure into multiple independent layers with recessed regions that segment the overall structure. Each package layer can be formed and tested separately before stacking, reducing the propagation of warpage through the entire structure. The recessed regions create physical separation that prevents warpage from one layer from directly affecting adjacent layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material structures in the packaging substrate and interconnect layers to compensate for thermal expansion differences. By using materials with matched thermal expansion coefficients or gradient structures, the composite design reduces differential stress during temperature cycling that would otherwise cause warpage in the stacked package assembly.

Inventive Principle:
Principle #40Composite materials

2Length of stationary object

If package thickness is reduced to achieve smaller form factor, then the overall device size decreases, but structural integrity and reliability of mounting features deteriorate

Engineering Contradiction:
Improvepackage thicknessVSAvoidstructural integrity
Core Design Contradiction:
Length of stationary objectVSStrength

Solution Approach 1:

The patent implements a nested structure where recessed regions are formed within the package substrate, creating a multi-level architecture. This nesting allows electrical connections and mounting features to be positioned at different vertical levels, effectively reducing the overall package thickness while maintaining adequate structural support through the hierarchical arrangement of components.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from a two-dimensional planar mounting approach to a three-dimensional stacked architecture with vertical interconnects. By moving mounting features and electrical connections into the vertical dimension through recessed regions and through-substrate vias, the package achieves reduced footprint and thickness while maintaining structural integrity through distributed support across multiple levels.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If stacking features are added to enable package stacking, then three-dimensional integration is achieved, but manufacturing complexity increases with difficult to control processes and material incompatibility

Engineering Contradiction:
Improvestacking capabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs the packaging substrate with universal recessed regions that can accommodate multiple types of packages and interconnect structures. The same substrate architecture supports different package configurations, making the manufacturing process more versatile and reducing the need for specialized tooling or processes for each stacking scenario, thereby simplifying overall manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent forms the recessed regions and prepares the mounting surfaces on the packaging substrate before the actual package stacking process. This preliminary preparation ensures that all stacking features are pre-configured with correct dimensions, positions, and material properties, eliminating the need for complex post-assembly adjustments and reducing manufacturing variability during the stacking operation.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If more mounting features are added to provide structural and electrical integrity for stacking, then reliability of connections improves, but the mounting process becomes more complex and yield decreases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmounting process ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple mounting features and electrical interconnect structures into integrated recessed regions that serve both mechanical attachment and electrical connection functions simultaneously. By merging these functions into unified structures, the number of separate mounting features is reduced while maintaining both structural and electrical integrity, simplifying the mounting process and improving yield.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8367465B2Integrated circuit package on package system
Publication Date: 2013.02.05 STATS CHIPPAC MANAGEMENT PTE LTD
  • US8367465B2 patent drawing
  • US8367465B2 patent drawing
  • US8367465B2 patent drawing

AI summary

A integrated circuit package on package system is provided including providing a base substrate having a base stackable connection, attaching a base integrated circuit on the base substrate, forming a stackable package including the base integrated circuit encapsulated with the base stackable connection partially exposed, and attaching a bottom package on the stackable package.