Stacked Active Layer Capacitor for High-Resolution Display Panels
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-resolution display panels face challenges with increased pixel density, leading to larger drive circuits and reduced aperture ratios due to the increased number of thin film transistors (TFTs), signal traces, and via holes, which affects display performance.
Innovation Solution
A display panel design featuring a first and second active layer with overlapping conductor regions forming electrodes for a capacitor, eliminating the need for additional via holes and lead wires to connect transistors, thereby reducing circuit size and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution of display panel is increased, then the image quality is improved, but the aperture ratio is reduced due to increased number of TFTs, signal traces, and via holes
Solution Approach 1:
The patent merges the functions of separate capacitor electrodes and transistor components into a unified structure. Specifically, the source/drain electrodes of transistors are directly formed as the electrode plates of the capacitor, eliminating the need for separate via holes and lead wires to connect these components. This integration reduces the overall circuit area while maintaining high resolution display quality.
Solution Approach 2:
The patent implements multi-functionality by designing the conductor regions to serve dual purposes: they act as both the source/drain electrodes for transistor operation and as the electrode plates for capacitor function. This eliminates the need for additional dedicated structures, thereby reducing the circuit footprint and preserving aperture ratio in high-resolution displays.
2Adaptability or versatility
If the number of via holes is increased to connect more TFTs and signal traces, then the circuit functionality is improved, but the circuit size increases
Solution Approach 1:
The patent combines multiple circuit functions into integrated structures. The capacitor electrodes are formed using the same conductor regions that serve as transistor source/drain electrodes, eliminating the need for separate via holes and connection traces. This merging approach maintains full circuit functionality while significantly reducing the overall circuit size.
Solution Approach 2:
The patent transitions from a planar two-dimensional layout to a three-dimensional stacked structure. By forming the second active layer on top of the first active layer and creating overlapping conductor regions in the vertical dimension, the patent enables capacitor electrodes to be formed without requiring additional lateral space, thus reducing circuit size while maintaining functionality.
3Reliability
If additional via holes and lead wires are added to connect capacitor electrodes, then the capacitor functionality is achieved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent merges the capacitor electrode formation process with the existing transistor electrode formation process. The same conductor regions that are patterned and formed for transistor source/drain connections automatically serve as capacitor electrodes, eliminating the need for separate via hole etching, filling, and lead wire formation steps. This reduces manufacturing complexity while ensuring reliable capacitor functionality.
Solution Approach 2:
The patent implements self-service by designing the conductor regions to automatically fulfill multiple functions. The overlapping conductor regions from different active layers self-form the capacitor electrodes without requiring additional processing steps, external intervention, or separate manufacturing operations. This self-organizing approach simplifies the manufacturing process while guaranteeing capacitor functionality.
Data Source
AI summary
The disclosure discloses a display panel, a manufacturing method thereof and a display device. The display panel includes a backing substrate, a first active layer arranged over the backing substrate, and a second active layer arranged on a side of the first active layer away from the backing substrate. The first active layer and the second active layer each comprise a conductor region, and perpendicular projections of the conductor regions of the first and second active layers on the backing substrate have an overlapping region. A part of the conductor region of the first active layer corresponding to the overlapping region forms as a first electrode, a part of the conductor region of the second active layer corresponding to the overlapping region forms a second electrode, and the first electrode and the second electrode form two electrodes of a capacitor.