Stacked Adhesive Structure for Semiconductor Warpage Control
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Solution Overview
Problem
Conventional semiconductor device manufacturing techniques face challenges in achieving high integration and thinness due to warpage issues during resin curing, which restricts device thickness and integration density.
Innovation Solution
A semiconductor device with a stacked adhesive structure using adhesive films with different material constant modifiers, including fillers with varying particle sizes, is employed to reduce warpage and stress, allowing for thinner and more integrated chip arrangements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-layer adhesive resin is used to bond chips, then the manufacturing process is simple, but warpage occurs during resin curing which restricts device thickness and integration density
Solution Approach 1:
The adhesive layer is divided into multiple sub-layers (first adhesive layer, second adhesive layer, third adhesive layer) with different filler contents. This segmentation allows each sub-layer to perform specific functions: the first layer provides strong bonding, the second layer controls warpage with moderate filler content, and the third layer reduces stress with high filler content, thereby resolving the contradiction between structural simplicity and warpage control.
Solution Approach 2:
The adhesive structure uses composite materials with varying filler concentrations across different layers. The first adhesive layer contains 0-30 wt% filler, the second contains 30-60 wt% filler, and the third contains 60-80 wt% filler. This composite approach enables simultaneous optimization of bonding strength, warpage control, and stress reduction, overcoming the limitations of single-material adhesive systems.
2Manufacturing precision
If corrective elements are added to reduce warpage during resin cure, then warpage is controlled, but the device thickness increases and high integration is prevented
Solution Approach 1:
The invention extracts the warpage control function from separate corrective elements and integrates it directly into the adhesive layers themselves. By incorporating fillers at controlled concentrations within the adhesive structure, the adhesive layers inherently compensate for curing shrinkage and prevent warpage, eliminating the need for additional corrective elements and maintaining thin device profile.
Solution Approach 2:
The multi-layer adhesive structure performs multiple functions simultaneously: bonding chips together, controlling warpage during curing, and reducing residual stress. The second adhesive layer with 30-60 wt% filler specifically addresses warpage control while the entire structure maintains thinness, making the adhesive system universally functional without requiring separate corrective components.
3Adaptability or versatility
If chips are mounted on an interposer substrate (SIP technique), then device independence is maintained, but bonding wires and bumps are required which prevent high density arrangement
Solution Approach 1:
The invention merges multiple chips directly onto a single substrate using the multi-layer adhesive structure, eliminating the need for separate interposer substrates, bonding wires, and bumps. This direct bonding approach combines the advantages of device independence with high integration density, as chips can be arranged in compact configurations without the space requirements of conventional SIP interconnect structures.
4Stress or pressure
If adhesive layers with high filler content are used to reduce stress, then stress is reduced, but adhesive strength decreases
Solution Approach 1:
The adhesive structure applies the principle of local quality by varying the filler content in different layers according to their specific functional requirements. The first adhesive layer near the chips has lower filler content (0-30 wt%) to maximize bonding strength, while the third adhesive layer away from the chips has higher filler content (60-80 wt%) to minimize residual stress. This spatial variation in material composition optimizes both adhesive strength and stress reduction simultaneously.
Data Source
AI summary
It is made possible to restrict warpage at the time of resin cure and achieve a smaller thickness. A semiconductor device includes: a first chip including a MEMS device and a first pad formed on an upper face of the MEMS device, the first pad being electrically connected to the MEMS device; a second chip including a semiconductor device and a second pad formed on an upper face of the semiconductor device, the second pad being electrically connected to the semiconductor device; and an adhesive portion having a stacked structure, and bonding a side face of the first chip and a side face of the second chip, the stacked structure including a first adhesive film formed by adding a first material constant modifier to a first resin, and a second adhesive film formed by adding a second material constant modifier to a second resin.