Stacked Buffer Units in Display Panel Driver Circuits
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Solution Overview
Problem
Conventional gate electrode driver circuits for OLED display panels require a wider frame to accommodate buffer sections, contradicting the design trend of narrow-framed products.
Innovation Solution
A display panel design with a gate electrode driver circuit that includes cascaded driver units, each comprising a signal generation module, a first output module, and a second output module. The first output module has two stacked buffer units, reducing the frame width while maintaining transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If two parallelly arranged buffer units are used for Nout and Pout signals, then the gate electrode driver circuit can generate both signal types, but the frame width increases
Solution Approach 1:
The patent transitions from a planar arrangement of buffer units to a three-dimensional stacked configuration. The first and second buffer units are arranged vertically along the third direction (perpendicular to the substrate plane) rather than horizontally, allowing both Nout and Pout signals to be generated within the same lateral footprint. This vertical stacking enables the circuit to maintain full signal generation capability while significantly reducing the horizontal space occupied by the buffer section.
2Length of stationary object
If the frame width is reduced to achieve narrow-framed products, then the aesthetic design is improved, but the space for buffer sections is insufficient
Solution Approach 1:
The invention utilizes the vertical dimension (third direction perpendicular to the substrate) to accommodate buffer units that would otherwise require horizontal space. By stacking the first buffer unit (for Nout) and second buffer unit (for Pout) vertically, the design reduces the lateral area occupied by the buffer section while maintaining sufficient functional area through the added vertical dimension.
Solution Approach 2:
The patent implements a nested arrangement where the second buffer unit is positioned vertically above the first buffer unit, with both units sharing the same lateral footprint. This nesting configuration allows the buffer section to be compacted vertically, reducing the horizontal space requirement while preserving the functional area needed for both buffer operations.
Data Source
AI summary
The present application discloses a display panel including a quantity N of driver units that are cascaded. The quantity N of the driver units are arranged along a first direction. Each of the driver units includes a first output module, a signal generation module, and a second output module disposed along a second direction. The first output module is configured to output a first gate electrode driving signal. The second output module is configured to output a second gate electrode driving signal. The first gate electrode driving signal is different from the second gate electrode driving signal. The first output module includes a first buffer unit and a second buffer unit stacked on each other along a third direction. The present application stacks two buffer units in the first output module, which reduce a width of a frame occupied by the first output module while guaranteeing performance of transistors.