Stacked Capacitor Electrodes in Liquid Crystal Array Substrates
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Solution Overview
Problem
In liquid crystal panels using low temperature polysilicon technology, forming a thin insulating film for capacitors is challenging, leading to thick capacitors that increase the capacitor area, which in turn enlarges the peripheral region, creating a disadvantage.
Innovation Solution
The method involves forming lower and upper conductive films to create display and capacitor electrodes, with an interlayer insulating film between them, allowing the capacitor to be layered with circuit elements, thus increasing capacitance without enlarging the peripheral region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the capacitor insulating film is formed in a thick thickness to ensure proper insulation, then the reliability of the capacitor is improved, but the capacitor area must be increased to maintain adequate capacitance, which enlarges the peripheral region
Solution Approach 1:
The invention transitions from a planar capacitor structure to a three-dimensional stacked structure by forming the capacitor insulating film in multiple layers (first and second capacitor insulating films) with corresponding capacitor electrodes sandwiched between them. This vertical stacking approach increases capacitance without expanding the peripheral region area, effectively resolving the contradiction between maintaining reliable insulation and minimizing area occupation.
2Quantity of substance
If the capacitor area is increased to provide sufficient capacitance for circuit elements, then the capacitance performance is improved, but the peripheral region must be enlarged to accommodate the larger capacitor
Solution Approach 1:
The patent implements a multi-layered capacitor structure where capacitor electrodes and insulating films are stacked vertically. The first capacitor electrode, second capacitor electrode, and intermediate capacitor insulating film are arranged in the thickness direction, creating a three-dimensional capacitance structure that increases total capacitance without requiring additional peripheral area.
Solution Approach 2:
The capacitor structure is nested within the peripheral region by stacking multiple capacitor units vertically. The first capacitor insulating film contains the first capacitor electrode, which is in turn contained by the second capacitor insulating film with the second capacitor electrode, creating a nested configuration that maximizes capacitance within a confined area.
Data Source
AI summary
A method of manufacturing an array substrate for a liquid crystal panel includes forming a lower conductive film above a circuit layer. A lower display electrode is formed using the lower conductive film in a display region and a lower capacitor electrode of a capacitor is formed using the lower conductive film in a peripheral region which is external to the display region. The method of manufacturing includes forming an upper conductive film above the lower display electrode and the lower capacitor electrode. An upper display electrode is formed using the upper conductive film in the display region and an upper capacitor electrode of the capacitor is formed using the upper conductive film in the peripheral region.