Stacked Capacitor ESL Reduction via Parallel Inductor Segmentation
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Solution Overview
Problem
High-frequency noise in information processing and communication devices is not adequately reduced by existing stacked capacitors due to high equivalent series inductance (ESL), which affects signal integrity and device performance.
Innovation Solution
A stacked capacitor design with multiple capacitor portions and inductor components connected in parallel, where the first and third capacitor portions have larger capacitance than the second, and their inductor components differ in physical length, reducing ESL and shifting resonance frequency to higher frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a conventional stacked capacitor with a single capacitor portion is used, then the structure is simple and easy to manufacture, but the equivalent series inductance (ESL) is high which fails to adequately reduce high-frequency noise
Solution Approach 1:
The capacitor is divided into multiple capacitor portions (first, second, and third capacitor portions) arranged in the laminating direction. Each portion has its own internal electrodes and contributes to reducing the overall ESL through parallel connection, effectively segmenting the inductance reduction function across multiple units while maintaining a integrated structure.
Solution Approach 2:
Multiple capacitor portions are combined within a single laminate body, with their inductor components connected in parallel. This merging approach achieves lower ESL than individual capacitors could provide alone, while the external electrodes integrate the multiple portions into a single functional unit that reduces high-frequency noise more effectively.
2Object-affected harmful factors
If capacitor portions are arranged to reduce ESL, then noise reduction performance improves, but the capacitance distribution and physical dimensions become more complex
Solution Approach 1:
Different capacitor portions are assigned different capacitance values based on their position and function. The first and third capacitor portions have larger capacitances than the second portion, creating a non-uniform capacitance distribution that optimizes ESL reduction while maintaining manufacturing feasibility through standardized dielectric layers and internal electrode patterns.
Solution Approach 2:
The capacitor structure employs asymmetric arrangement where the first and third capacitor portions are positioned at opposite ends of the laminate and have larger capacitances, while the second capacitor portion in the middle has smaller capacitance. This asymmetric design optimizes the parallel inductor connection geometry to minimize ESL while maintaining symmetrical external electrode connections for manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces equivalent series inductance, improves noise reduction in high-frequency ranges, and enhances the reliability and mounting flexibility of the capacitor, thereby improving device performance and noise tolerance.
Implementation Method 1
Inductor components of the first capacitor portion and the third capacitor portion are different in physical length from each other and are connected in parallel between the first external electrode and the third external electrode and between the first external electrode and the fourth external electrode
Implementation Method 2
a first capacitor portion, a second capacitor portion, and a third capacitor portion which are arrayed in the laminate from the first surface toward the second surface along a laminating direction
Implementation Method 3
first internal electrodes each of which is exposed to the first end surface and electrically connected to the first external electrode and second internal electrodes each of which is exposed to the first side surface and the second side surface and electrically connected to the third external electrode and the fourth external electrode are alternately disposed to face each other through dielectric layers of the plurality of dielectric layers
Implementation Method 4
reducing ESL and shifting resonance frequency to higher frequencies
Data Source
AI summary
A stacked capacitor includes a laminate; first to fourth external electrodes; a first capacitor portion, a second capacitor portion, and a third capacitor portion which are arrayed in the laminate from a first surface toward a second surface along a laminating direction. The first capacitor portion and the third capacitor portion each have a capacitance larger than that of the second capacitor portion. Inductor components of the first capacitor portion and the third capacitor portion are different in physical length from each other and are connected in parallel between the first external electrode disposed on a first end surface and the third external electrode disposed on a first side surface and between the first external electrode and the fourth external electrode disposed on a second side surface.