Stacked Capacitor Structure for Inductor Shielding
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Solution Overview
Problem
Inductor/transformer devices on silicon substrates suffer from substrate losses due to electromagnetic energy coupling, reducing the quality factor, and the eddy current effect exacerbates these losses, which standard CMOS processes cannot fully mitigate.
Innovation Solution
A stacked capacitor structure is introduced, comprising a MOS varactor and a stacked capacitor with multiple metal layers positioned below an inductive element, acting as a high-performance ground shield to minimize substrate coupling and eddy current effects, thereby enhancing the quality factor of inductive elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a ground shield is placed on the silicon substrate to reduce substrate losses, then the resistance is reduced, but the eddy current effect occurs causing energy loss
Solution Approach 1:
The ground shield is segmented into multiple isolated metal regions (first metal region, second metal region, third metal region) that are electrically disconnected from each other. This segmentation prevents the formation of continuous eddy current paths while maintaining low resistance to ground, thereby reducing substrate losses without causing eddy current effects.
2Loss of energy
If the resistance of the silicon substrate is reduced to minimize energy loss, then substrate losses decrease, but the quality factor of the inductor/transformer is reduced due to electromagnetic coupling
Solution Approach 1:
Different metal regions are positioned at specific locations beneath the inductive element to provide localized shielding where electromagnetic coupling occurs. The first metal region is positioned to shield one area while the second and third metal regions shield other areas, creating non-uniform local quality characteristics that reduce substrate losses without degrading the overall quality factor.
3Ease of manufacture
If standard CMOS processes are used to manufacture inductor/transformer, then manufacturing is simplified, but substrate losses cannot be fully mitigated
Solution Approach 1:
The metal layers that would normally be unused in standard CMOS processes are repurposed to form the ground shield structure. These existing metal layers serve dual functions: maintaining the standard CMOS manufacturing process and providing substrate loss mitigation, thereby achieving energy loss reduction without complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stacked capacitor structure effectively reduces substrate losses and improves the quality factor of inductive elements by utilizing the area under the inductive elements and preventing induced currents, thus optimizing performance.
Implementation Method 1
electromagnetic energy generated by the operation of the inductor/transformer can be coupled with the silicon substrate
Implementation Method 2
the eddy current effect also results in the substrate losses. In order to avoid the occurrence of the eddy current effect on the ground shield
Data Source
AI summary
A stacked capacitor structure includes a MOS varactor and a stacked capacitor. The stacked capacitor is electrically connected to the MOS varactor. The MOS varactor includes a substrate, a gate, a first source/drain and a second source/drain. The substrate has a well, and the gate is positioned over the well. The first source/drain and the second source/drain are formed in the well and positioned at opposing sides of the gate. The stacked capacitor includes a plurality of metal layers. The metal layers are spaced from each other, stacked above the gate, and positioned below an inductive element.