Stacked Capacitor Interposer Layout for Compact Semiconductor Packaging

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Solution Overview

Problem

Existing semiconductor devices face challenges in reducing the longitudinal footprint of stacked capacitors, which limits the overall size and space for additional electrical connections and increases the risk of wire damage during manufacturing.

Innovation Solution

The implementation of vertically aligned stacked capacitors with an interposer, where the first and second capacitors are at least partially aligned, reducing the longitudinal footprint and allowing for additional space for electrical connections and minimizing wire damage through optimized bonding structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If capacitors are placed side-by-side in a stacked configuration, then electrical connectivity is enhanced, but the longitudinal footprint increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidlongitudinal footprint
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent transitions from a lateral side-by-side capacitor arrangement to a vertical stacking configuration, utilizing the third dimension (height) to accommodate multiple capacitors. This dimensional change allows capacitors to be stacked one above another rather than placed adjacent to each other horizontally, thereby reducing the longitudinal footprint while maintaining electrical connectivity through vertical interconnections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where capacitors are stacked vertically with one capacitor positioned above another, similar to nested dolls. The lower capacitor serves as a base for the upper capacitor, with interconnect structures extending vertically between them. This nesting approach consolidates multiple capacitor components into a compact vertical arrangement, minimizing the horizontal space required.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Length of stationary object

If the longitudinal footprint is reduced by vertical stacking, then device size decreases, but wire damage risk increases during manufacturing

Engineering Contradiction:
Improvelongitudinal footprintVSAvoidwire damage risk
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent introduces an interposer structure as an intermediary component between the stacked capacitors and the substrate. This interposer serves as a mediator that provides robust electrical interconnections and mechanical support, reducing the stress and damage risk to bond wires during the manufacturing process. The interposer acts as a buffer that protects the delicate wire bonds while enabling the compact vertical capacitor arrangement.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs protective measures in advance by incorporating the interposer structure before final assembly, which cushions and protects the bond wires from damage during subsequent manufacturing steps. The interposer is positioned beforehand to provide structural support and stress distribution, preventing wire damage before it can occur during handling and assembly operations.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Area of stationary object

If vertical stacking with interposer is implemented, then space for electrical connections increases, but device complexity increases

Engineering Contradiction:
Improvespace for electrical connectionsVSAvoidstructural complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The interposer structure serves multiple functions simultaneously: it provides electrical interconnections between stacked capacitors, offers mechanical support for bond wires, enables vertical stacking architecture, and creates additional space for electrical connections. By making the interposer a multi-functional component, the patent avoids the need for separate dedicated structures for each function, thereby managing complexity while achieving the desired space for electrical connections.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12532781B2Stacked capacitors for semiconductor devices and associated systems and methods
Publication Date: 2026.01.20 MICRON TECHNOLOGY INC
  • US12532781B2 patent drawing
  • US12532781B2 patent drawing
  • US12532781B2 patent drawing

AI summary

Semiconductor devices, and related systems and methods, are disclosed herein. In some embodiments, the stacked semiconductor device includes a package substrate having an inner surface, a die stack carried by the inner surface, and a stacked capacitor device carried by the inner surface adjacent to the die stack. The die stack can include one or more semiconductor dies, each of which can be electrically coupled to the inner surface by one or more bond wires and/or solder structures. The stacked capacitor device can include a first capacitor having a lower surface attached to the inner surface of the package substrate, a interposer having a first side attached to an upper surface of the first capacitor, and a second capacitor attached to a second side of the interposer opposite the first side.