Stacked Capacitor Structure for Higher Capacitance in Less Area

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing capacitor structures face challenges in increasing capacitance while maintaining a reduced size, and there is a need to simplify the manufacturing process.

Innovation Solution

A capacitor structure is designed with stacked first and second capacitor device structures, where the first capacitors are embedded in a first substrate and the second capacitors are embedded in a second substrate, connected in parallel through a circuit layer, enhancing capacitance and simplifying the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If capacitor size is reduced to meet miniaturization requirements, then device area is decreased, but capacitance increases become more difficult

Engineering Contradiction:
Improvecapacitor areaVSAvoidcapacitance
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The patent transitions from planar capacitor arrangement to three-dimensional stacked configuration. Multiple capacitor devices are vertically stacked with circuit layers positioned between them, enabling capacitance multiplication without increasing the footprint area. This vertical stacking approach allows multiple capacitive elements to occupy the same lateral space while maintaining electrical independence through intermediate circuit layers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple capacitor devices are integrated to increase capacitance, then capacitance is improved, but device structure becomes more complex

Engineering Contradiction:
ImprovecapacitanceVSAvoiddevice structure
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges multiple capacitor devices into a unified stacked structure where shared components and symmetric arrangements reduce overall complexity. The circuit layers serve dual purposes by providing both electrical connectivity and structural support for adjacent capacitors. This consolidation approach achieves high capacitance while maintaining manageable structural complexity through functional integration.

Inventive Principle:
Principle #5Merging (Combining)

3Area of stationary object

If capacitors are made smaller to reduce size, then area is decreased, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecapacitor areaVSAvoidmanufacturing precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent segments the capacitor system into modular units with standardized dimensions and interfaces. Each capacitor device maintains consistent geometric parameters while being arranged in discrete stacked positions. This segmentation strategy enables precise manufacturing through repetition of proven unit designs, reducing the cumulative precision challenges associated with miniaturized monolithic structures.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250254979A1Capacitor structure
Publication Date: 2025.08.07 WINBOND ELECTRONICS CORP
  • US20250254979A1 patent drawing
  • US20250254979A1 patent drawing
  • US20250254979A1 patent drawing

AI summary

A capacitor structure includes a first capacitor device structure, a first circuit layer, and at least one second capacitor device structure. The first capacitor device structure includes a first substrate and first capacitors. The first capacitors are located in the first substrate. The first circuit layer is located on the first capacitor device structure. The at least one second capacitor device structure is located on the first circuit layer. The second capacitor device structure includes a second substrate and second capacitors. The second capacitors are located in the second substrate. The first capacitors and the second capacitors are connected in parallel by the first circuit layer.