Selective Contact Metals in Stacked CFETs for Lower Contact Resistance

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Solution Overview

Problem

Existing complementary field effect transistors (CFETs) face challenges with high contact resistance and limited device performance due to difficulties in deploying gate-all-around (GAA) or nanoribbon transistors and backside contacts, which hinder the advancement of transistor structures in integrated circuits.

Innovation Solution

The use of selective frontside and backside contact metals, including titanium nitride for frontside contacts and tungsten or tungsten plugs for deep vias, along with recessed backside contacts, to improve contact resistance and strain engineering in stacked transistor structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If backside contacts are deployed to reduce resistance and increase device density, then device density and performance are improved, but contact resistance becomes excessively high due to deployment difficulties

Engineering Contradiction:
Improvedevice performanceVSAvoidcontact resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies different metal materials to different locations of the contact structure. Titanium nitride is used for frontside contacts while tungsten is used for backside contacts and deep vias. This local differentiation optimizes contact resistance at each specific location, achieving low overall contact resistance while enabling backside contact deployment for improved device density and performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The contact structure employs composite materials consisting of titanium nitride and tungsten in different regions. The frontside contact uses titanium nitride which provides good adhesion and low contact resistance, while the backside contact uses tungsten which provides low resistivity and mechanical stability. This composite approach resolves the contradiction by combining the advantages of different materials at appropriate locations.

Inventive Principle:
Principle #40Composite materials

2Quantity of substance

If GAA or nanoribbon transistor structures are deployed to increase transistor density, then device density is improved, but device performance is limited due to manufacturing difficulties

Engineering Contradiction:
Improvetransistor densityVSAvoiddevice performance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent implements location-specific metal selection where titanium nitride is applied to frontside contacts and tungsten to backside contacts and deep vias. This local optimization enables successful deployment of GAA and nanoribbon transistor structures by addressing contact resistance issues at each specific location, thereby achieving both high transistor density and maintained device performance.

Inventive Principle:
Principle #3Local quality

3Object-affected harmful factors

If selective contact metals are used to reduce contact resistance, then contact resistance is improved, but device complexity increases due to multiple metal deposition processes

Engineering Contradiction:
Improvecontact resistanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The contact structure is segmented into different functional regions with different metal materials. The frontside contact is separated from the backside contact, each using optimized metal materials for their specific function. This segmentation allows for reduced contact resistance at each interface while the modular nature of the segmented structure makes the manufacturing process more manageable despite the multiple metal depositions required.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250210460A1Transistor performance improvement for stacked devices using selective front and backside contact metals
Publication Date: 2025.06.26 INTEL CORP
  • US20250210460A1 patent drawing
  • US20250210460A1 patent drawing
  • US20250210460A1 patent drawing

AI summary

Devices, transistor structures, systems, and techniques are described herein related to selective front and backside contacts for stacked transistor devices. A transistor structure includes stacked first and second semiconductor structures with stacked first and second conductivity type source and drain structures coupled to the first and second semiconductor structures, respectively. A selective metal is on the frontside of first conductivity type source and a different metal is on the backside of the second conductivity type source. A deep via optionally having yet a different metal couples the frontside contact to backside metallization over the backside contact.