Stacked Channel MBCFET Layout for Region-Specific Transistor Characteristics
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Solution Overview
Problem
Existing semiconductor devices with multi-bridged channel field effect transistors (MBCFETs) lack the ability to manufacture transistors with different characteristics, as they typically have the same number of channels in each stack, limiting their electrical performance and functionality.
Innovation Solution
A semiconductor device is designed with distinct regions having different numbers of vertically stacked channels, where the second region has fewer channels than the first region, allowing for varying electrical characteristics by adjusting the height and structure of the channels and gate structures in each region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If all MBCFETs have the same number of channels in each stack, then manufacturing is simplified and consistent, but the device lacks the ability to implement transistors with different electrical characteristics
Solution Approach 1:
The device is divided into multiple regions (first region, second region, third region) where each region contains MBCFETs with different numbers of channels. This segmentation allows different electrical characteristics to be implemented in different regions while maintaining a systematic manufacturing approach.
Solution Approach 2:
Different regions of the substrate are given different local qualities by varying the number of channels in the vertical stacks. The first region has MBCFETs with a first number of channels, the second region has MBCFETs with a second number of channels, and the third region has MBCFETs with a third number of channels, allowing each region to be optimized for specific electrical characteristics.
2Reliability
If MBCFETs have different numbers of channels to achieve different characteristics, then electrical performance is enhanced, but manufacturing precision and consistency become more difficult to maintain
Solution Approach 1:
Sacrificial lines are formed in advance in all regions before the actual channel formation. These sacrificial lines serve as templates that guide the subsequent formation of channels with different numbers in different regions, ensuring manufacturing precision through a preliminary structured approach.
Solution Approach 2:
Sacrificial lines act as intermediary structures that facilitate the formation of channels with different numbers in different regions. The sacrificial lines are formed first, then channels are formed around them, and finally the sacrificial lines are removed, leaving the desired channel structures with high manufacturing precision.
3Adaptability or versatility
If the number of channels is varied across regions, then device functionality is enhanced, but the manufacturing process becomes more complex
Solution Approach 1:
The manufacturing process merges multiple operations into unified steps. For example, isolation patterns are formed to surround sacrificial lines and channels simultaneously, and gate structures are formed to cover multiple channel stacks in different regions in a single process step, simplifying the overall manufacturing despite the complexity of having different channel numbers.
Solution Approach 2:
The sacrificial lines serve multiple functions: they act as templates for channel formation, provide structural support during processing, and are later removed to create the final channel structures. This multi-functionality simplifies the manufacturing process by reducing the number of separate steps needed.
Data Source
AI summary
A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.


