Stacked Chassis Link Aggregation Group
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing packet network device stacking systems face limitations such as bandwidth constraints, increased latency, packet dropping, and lack of flexibility due to proprietary connections, which hinder their effectiveness in handling significant traffic and restricting network features like link aggregations and multicast groups.
Innovation Solution
A novel approach is taken by creating a single logical chassis from two physical chassis linked only through their front-end traffic ports, using a link aggregation group and negotiating a stack master to configure line cards for appropriate behavior, reducing cross-chassis traffic and the likelihood of system failure, and allowing for reconfiguration as separate switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If proprietary connections are used to link stacked chassis, then device complexity is reduced, but bandwidth and latency performance deteriorate
Solution Approach 1:
The patent makes the front-end traffic ports serve a dual function: their original purpose for external network communication and an additional purpose for inter-chassis stacking communication. By negotiating stack partner relationships over these existing ports, the system eliminates the need for separate proprietary stacking connections, thereby achieving universal port usage that reduces device complexity while maintaining high bandwidth performance through standard Ethernet infrastructure.
2Ease of operation
If proprietary stacking connections are used, then ease of operation is improved, but system reliability deteriorates due to packet dropping and latency
Solution Approach 1:
The patent implements self-service through automated negotiation protocols where chassis automatically discover stack partners, elect a stack master, and configure forwarding behaviors without manual intervention. This self-organizing capability maintains ease of operation while significantly improving reliability by eliminating manual configuration errors and enabling dynamic adaptation to network conditions, thereby reducing packet dropping and latency issues.
3Device complexity
If dedicated stacking ports are used, then device complexity is reduced, but adaptability deteriorates due to restricted network features
Solution Approach 1:
The patent enables front-end traffic ports to perform multiple functions simultaneously: external network communication, inter-chassis stacking, and support for various network features like link aggregations and multicast groups. This multi-functional approach eliminates the need for dedicated stacking ports while maintaining full adaptability to different network configurations and features, as the same ports can be dynamically allocated for different purposes based on negotiation outcomes.
4Productivity
If multiple chassis are stacked with proprietary connections, then productivity is improved, but loss of time increases due to increased latency
Solution Approach 1:
The patent introduces a software-based intermediary layer (stack master and stack partner negotiation protocol) that manages inter-chassis communication over standard Ethernet ports. This intermediary approach enables efficient traffic forwarding by establishing optimized paths and reducing protocol overhead, thereby maintaining high productivity through multi-chassis stacking while minimizing latency compared to proprietary physical connection solutions.
Data Source
AI summary
A stacked chassis comprising multiple physical switch/router chassis operates without any special stacking hardware or stacking channels. Instead, a stacking LAG is installed between front-end switch ports on the stacked chassis. The chassis controllers negotiate a master, which controls operation of all chassis in the stack. A stacked-chassis-wide port numbering scheme is used to distribute information to all line cards in the system. Each line card processes the information to distill physical-chassis significant information for operation of that chassis in the stack.