Stacked Semiconductor Chip Adhesive Structure for Mechanical Endurance

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Solution Overview

Problem

Existing semiconductor device packaging techniques face challenges in achieving high mechanical endurance and efficient adhesive structure management, particularly in stacked semiconductor chip configurations, where the extension of adhesive structures can cause irregularities and electrical shorts.

Innovation Solution

A method involving the sequential stacking and compression of semiconductor chips with adhesive films on a package substrate, forming an adhesive structure with extensions on sidewalls, followed by removal of these extensions and molding layer formation to cover the chips, which enhances mechanical endurance and prevents electrical shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If adhesive structures are extended to cover sidewalls of stacked semiconductor chips, then mechanical endurance is improved, but irregularities and electrical shorts may occur

Engineering Contradiction:
Improvemechanical enduranceVSAvoidelectrical short prevention
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The adhesive structure is segmented into two distinct parts: a body portion that fills the gap between chips for mechanical support, and an extension portion that selectively covers sidewalls for enhanced endurance. This segmentation allows each part to fulfill its specific function without causing electrical shorts, as the extension is controlled and limited to appropriate areas.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The adhesive structure exhibits local quality by having different portions with different functions and properties. The body portion provides gap-filling and mechanical bonding, while the extension portion provides localized sidewall coverage for enhanced mechanical endurance. This localized differentiation allows the adhesive to improve strength where needed without creating irregularities or electrical shorts in other areas.

Inventive Principle:
Principle #3Local quality

2Strength

If adhesive structures are extended to cover sidewalls, then mechanical endurance is improved, but appearance irregularities occur

Engineering Contradiction:
Improvemechanical enduranceVSAvoidappearance regularity
Core Design Contradiction:
StrengthVSShape

Solution Approach 1:

By segmenting the adhesive structure into body and extension portions, the invention controls where adhesive material is present. The extension portion is deliberately limited to covering sidewalls of stacked chips, creating a regular and predictable appearance rather than irregular adhesive overflow, while still providing the mechanical endurance benefits.

Inventive Principle:
Principle #1Segmentation

3Area of moving object

If fine pitch between interconnect members is maintained, then device density is improved, but mechanical stability may be compromised

Engineering Contradiction:
Improvepitch between interconnect membersVSAvoidmechanical stability
Core Design Contradiction:
Area of moving objectVSStability of the object's composition

Solution Approach 1:

The adhesive structure, including both body and extension portions, is formed in advance during the stacking process to provide preliminary mechanical support and stabilization. This preliminary action ensures that even with fine pitch between interconnect members, the overall mechanical stability is maintained through the adhesive's structural support.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively increases the mechanical endurance of semiconductor devices by eliminating adhesive structure extensions, preventing electrical shorts, and reducing heat-induced warpage, while maintaining a fine pitch between interconnect members without compromising the appearance of the semiconductor package.

Implementation Method 1

Each of the first semiconductor chips includes a first adhesive film facing the package substrate. Each of the second semiconductor chips includes a second adhesive film facing the first semiconductor chip. Compressing the first adhesive film and the second adhesive film to form an adhesive structure.

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS10923465B2Semiconductor device having stacked semiconductor chips and method for fabricating the same
Publication Date: 2021.02.16 SAMSUNG ELECTRONICS CO LTD
  • US10923465B2 patent drawing
  • US10923465B2 patent drawing
  • US10923465B2 patent drawing

AI summary

A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.