Stacked Semiconductor Chip Layout for High-Breakdown Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices, such as high-voltage integrated circuits (HVIC) for driving power semiconductor elements, face challenges in achieving high breakdown voltage without increasing the area of the semiconductor substrate, which results in higher manufacturing costs.
Innovation Solution
A semiconductor device configuration that includes a first switching element on a first semiconductor chip, a first control circuit on a second semiconductor chip to control the switching element, a level-shift circuit to convert the control signal's potential, and a drive circuit on a third semiconductor chip to drive the switching element, where the third semiconductor chip is placed on the first semiconductor chip, allowing for high breakdown voltage without increasing substrate area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a semiconductor substrate with greater area is used to achieve higher breakdown voltage, then breakdown voltage is improved, but manufacturing cost increases
Solution Approach 1:
The invention divides the semiconductor device into multiple separate chips: a first chip containing the switching element, a second chip containing the control circuit, and a third chip containing the drive circuit. This segmentation allows each chip to be optimized independently, achieving high breakdown voltage without requiring a large single substrate area, thus reducing manufacturing costs.
Solution Approach 2:
The invention transitions from a two-dimensional planar layout on a single substrate to a three-dimensional stacked configuration where the third chip (drive circuit) is positioned on top of the first chip (switching element). This vertical arrangement enables high breakdown voltage performance while maintaining a compact footprint and avoiding the need for larger substrate areas.
2Device complexity
If high-voltage integrated circuits are implemented on a single substrate, then device integration is improved, but substrate area increases
Solution Approach 1:
The invention segments the integrated circuit functionality across three separate chips rather than integrating everything on a single substrate. The switching element, control circuit, and drive circuit are distributed on different chips, which are then interconnected. This approach achieves functional integration while avoiding the area expansion that would result from placing all components on one large substrate.
Solution Approach 2:
The invention employs a nested structure where the third chip (drive circuit) is placed on top of the first chip (switching element), creating a stacked configuration. This nesting allows multiple functional blocks to occupy overlapping spatial footprints in the vertical dimension, thereby reducing the overall planar area requirement while maintaining full functionality.
Data Source
AI summary
A semiconductor device includes: a first switching element provided in a first semiconductor chip; a first control circuit provided in a second semiconductor chip so as to output a signal for controlling the first switching element; a level-shift circuit provided to convert a potential of the signal output from the first control circuit; and a drive circuit provided in a third semiconductor chip so as to drive the first switching element in accordance with the signal with the potential converted by the level-shift circuit, wherein the third semiconductor chip is provided on the first semiconductor chip.