Conductive Dam Layout in Stacked Semiconductor Packages

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Solution Overview

Problem

The increased form factor and defect rate of semiconductor packages due to underfill overflow and contamination of pad regions in System In Package (SIP) designs, which hinder the miniaturization of semiconductor devices.

Innovation Solution

Incorporating dams made of conductive materials on the circuit substrate to prevent underfill flow and contamination, with the dams strategically positioned to overlap chips and pads, thereby blocking underfill overflow and maintaining the package's compact size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If underfill is used to protect bumps under the flip chip, then reliability is improved, but the underfill flows out to edges of the flip chip causing form factor increase and pad region contamination

Engineering Contradiction:
Improvebump protectionVSAvoidunderfill overflow and contamination
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A dam structure is introduced as an intermediary element between the underfill and the pad regions/edges. The dam acts as a barrier that allows the underfill to perform its protective function while preventing it from flowing into harmful areas, thus resolving the contradiction between reliability improvement and harmful overflow effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The circuit substrate is segmented into different functional zones using the dam structure. The dam creates a distinct boundary zone that separates the underfill containment area from the pad regions and edges, allowing each zone to serve its specific function without interference from the underfill overflow.

Inventive Principle:
Principle #1Segmentation

2Reliability

If underfill flows out to edges of the flip chip, then bump protection is maintained, but the form factor of the semiconductor package increases

Engineering Contradiction:
Improvebump protectionVSAvoidpackage form factor
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The dam serves as a mediator that enables the underfill to provide bump protection while containing its spread within a defined area. This prevents the underfill from extending the package form factor while maintaining the protective function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dam structure is formed in advance before underfill application, establishing predetermined boundaries that guide and limit underfill flow. This preliminary containment structure ensures the underfill remains within the desired area, preventing form factor increase.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If underfill flows out to edges of the flip chip, then bump protection is maintained, but defect rate of SIP increases due to pad region contamination

Engineering Contradiction:
Improvebump protectionVSAvoiddefect rate
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The dam acts as a protective intermediary that blocks underfill from reaching pad regions, thereby preventing contamination-related defects while preserving the underfill's bump protection function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dam creates a segmented boundary that separates the underfill application zone from the pad regions, ensuring that underfill remains confined to its functional area and does not contaminate sensitive pad areas, thus reducing defect rates.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11742329B2Semiconductor package
Publication Date: 2023.08.29 SAMSUNG ELECTRONICS CO LTD
  • US11742329B2 patent drawing
  • US11742329B2 patent drawing
  • US11742329B2 patent drawing

AI summary

A semiconductor package including a circuit substrate including a plurality of interconnections; a first chip on the circuit substrate; a second chip stacked on the first chip; a plurality of first pads on the circuit substrate, the plurality of first pads overlapping the first chip; a plurality of bumps between the circuit substrate and the first chip; a plurality of second pads on an edge portion of a first side of the circuit substrate, the plurality of second pads electrically connected to the second chip through a conductive wire; an underfill that fills a space between the circuit substrate and the first chip; and a first dam on the circuit substrate, the first dam overlapping the first chip. The first dam includes a conductive material and overlaps at least one of the plurality of interconnections.