3D Stacked Semiconductor Chips with ID-Controlled Data Transmission
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Solution Overview
Problem
Three-dimensional semiconductor devices face challenges in maximizing integration density and reducing packaging area, as existing through silicon via (TSV) techniques are limited in efficiently connecting vertically stacked semiconductor chips for data transmission and reception.
Innovation Solution
The semiconductor device employs a master chip and multiple slave chips vertically stacked and electrically connected via through electrodes, utilizing specific logic level combinations of chip ID signals to activate transmitters and receivers for data output and input operations, optimizing data transmission and reception processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If through silicon via (TSV) technique is used to electrically connect vertically stacked semiconductor chips, then integration density is increased and packaging area is reduced, but data transmission efficiency and power consumption optimization are limited
Solution Approach 1:
The semiconductor device is divided into multiple chips (master chip and slave chips) stacked vertically, with each chip containing multiple through electrodes. This segmentation allows independent data transmission paths between chips, improving overall data transmission efficiency while maintaining high integration density through the vertical stacking configuration.
2Volume of moving object
If multiple slave chips are vertically stacked with master chip, then integration density is maximized, but power consumption increases due to continuous activation of transmitters and receivers
Solution Approach 1:
The patent implements periodic activation of transmitters and receivers based on chip ID signals. Instead of continuous operation, transmitters and receivers are activated only when their corresponding chip ID is detected, creating a periodic on-demand operation mode that significantly reduces power consumption while maintaining high integration density in the vertically stacked configuration.
3Use of energy by moving object
If chip ID signals are used to selectively activate transmitters and receivers, then power consumption is reduced, but device complexity increases due to additional control logic
Solution Approach 1:
The chip ID signal serves multiple functions simultaneously: it acts as a identification signal for chip recognition, a control signal for activating transmitters and receivers, and a selection signal for determining which slave chip should communicate. This multi-functionality reduces the need for separate control logic circuits, thereby limiting the increase in device complexity while achieving power consumption reduction through selective activation.
Data Source
AI summary
A semiconductor device includes a master chip and a first slave chip. The master chip outputs a write signal or read signal and a chip identification (ID) signal and outputs data through a transmitter activated by the write signal or receives data through a receiver activated by the read signal. The first slave chip enters a write operation according to the write signal and activates a first receiver to store the data when the chip ID signal has a first logic level combination. The first slave chip enters a read operation according to the read signal and configured to activate a first transmitter to output the data when the chip ID signal has a first logic level combination. The master chip and the first slave chip are vertically stacked and are electrically connected to each other by a plurality of through electrodes penetrating the first slave chip.