3D Stacked Imaging Chip Insulating Film Structure for Leakage Control

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Solution Overview

Problem

In 3D stacked semiconductor chips, the thinning of the silicon substrate is limited by the risk of leakage through defects caused by polishing or contamination, especially when the depletion layer extends to the polished surface.

Innovation Solution

The use of a stack of insulating films, including a first insulating film with oxygen and a second insulating film with a High-k dielectric, on the polished surface of the silicon substrate to prevent leakage by generating a polarizing electric field that draws charges away from defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If the silicon substrate is thinned to reduce chip thickness, then the overall device size is reduced, but leakage occurs through defects caused by polishing or contamination

Engineering Contradiction:
Improvechip thicknessVSAvoidleakage prevention
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent applies preliminary action by forming the insulating film stack on the silicon substrate before the depletion layer extends to the polished surface. The insulating films are deposited in advance to create a protective barrier that prevents leakage through polishing defects before the thinning process completes, thereby enabling safer substrate thinning while maintaining device reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulating films serve as an intermediary layer between the silicon substrate and the external environment. This intermediate structure prevents direct contact between the depletion layer and defect sites on the polished surface, blocking the leakage path while allowing the substrate to be thinned to greater extents

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the silicon substrate is thinned to enable 3D stacking, then integration density is improved, but device characteristics are affected due to leakage

Engineering Contradiction:
Improveintegration densityVSAvoiddevice characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The insulating film stack is formed preliminarily before substrate thinning and 3D stacking operations. This pre-formed protective structure enables the substrate to be thinned to thinner dimensions required for high-density 3D stacking while preventing leakage that would otherwise degrade device characteristics, thus allowing integration density improvement without sacrificing reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulating films act as an intermediary protective layer that enables the substrate to be thinned to greater extents required for 3D stacking. This intermediate structure blocks leakage paths through polishing defects, allowing the depletion layer to extend closer to the surface without compromising device characteristics, thereby enabling higher integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for further reduction in the thickness of the silicon substrate without affecting device characteristics, thereby enhancing the integration and reducing the size of the solid-state imaging device.

Implementation Method 1

The use of a stack of insulating films, including a first insulating film with oxygen and a second insulating film with a High-k dielectric, on the polished surface of the silicon substrate to prevent leakage by generating a polarizing electric field that draws charges away from defects

Methodology Applied
Scientific EffectPolarization: Polarisation

Data Source

PatentUS20250031475A1Semiconductor chip, solid-state imaging device, and electronic equipment
Publication Date: 2025.01.23 SONY SEMICON SOLUTIONS CORP
  • US20250031475A1 patent drawing
  • US20250031475A1 patent drawing
  • US20250031475A1 patent drawing

AI summary

Provided is a semiconductor chip, a solid-state imaging device, and electronic equipment which achieve further reduction in thickness of a silicon substrate, required for 3D staking and which have a structure with no effect on device characteristics. Such a configuration having a first semiconductor chip including photodiodes, a second semiconductor chip including a signal processing circuit from the photodiodes and which is stacked on the first semiconductor chip, a first insulating film which is stacked on a second surface of the second semiconductor chip that is opposite to a first surface thereof having the first semiconductor chip stacked thereon and which includes oxygen, and a second insulating film which is stacked on the first insulating film and which includes oxygen are made, thereby preventing occurrence of leakage at a depletion layer of a transistor in the semiconductor chip and achieving reduction in film thickness.