Stacked Chip Package with Leadframe Bus Bar
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Solution Overview
Problem
Conventional chip-stacked package structures face challenges of increased thickness or limited chip stacking due to spacer usage for same-sized chips and size constraints for different-sized chips, respectively.
Innovation Solution
An offset chip-stacked package structure with a leadframe having a bus bar, where semiconductor chips are misaligned and electrically connected using a leadframe with inner and outer leads, and a die pad, allowing for higher density and thinner thickness, along with flexible circuit design and enhanced reliability through the use of a bus bar for electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If spacers are used to prevent direct contact between chips for wire-bonding, then electrical connection is enabled, but package thickness increases
Solution Approach 1:
The leadframe serves as an intermediary structure that provides both mechanical support and electrical connection pathways. The bus bar specifically acts as a mediator to establish electrical connections between stacked chips without requiring spacers, thereby maintaining thin package thickness while ensuring reliable electrical connectivity.
Solution Approach 2:
The leadframe structure combines multiple functions: it provides mechanical support for chip stacking, establishes electrical connections through bus bars, and eliminates the need for separate spacer components. This multi-functional design resolves the contradiction by integrating spacing and connection functions into a single structure.
2Reliability
If chips of different sizes are stacked with the upper chip smaller than the lower chip, then stacking is enabled, but the number of stackable chips is limited
Solution Approach 1:
The leadframe structure employs asymmetric design with bus bars positioned to accommodate chips of varying sizes and configurations. This asymmetric layout allows chips to be stacked in non-traditional arrangements, increasing the number of stackable chips beyond the limitations of symmetric, uniformly-sized chip stacking.
Solution Approach 2:
The invention transitions from traditional planar chip arrangements to three-dimensional stacking with offset positions. By utilizing vertical and lateral offset dimensions, the leadframe enables multiple chips to be stacked in configurations that maximize space utilization and increase the total number of stackable chips.
3Volume of moving object
If offset chip-stacked structure with leadframe having bus bar is used, then higher density and thinner thickness are achieved, but manufacturing complexity increases
Solution Approach 1:
The leadframe integrates multiple functions into a single component: mechanical support, electrical connection pathways, and spacing structures are merged into one piece. This consolidation reduces the total number of discrete components and assembly steps, thereby reducing manufacturing complexity despite achieving high density and thin profile.
Data Source
AI summary
The present invention provides a chip-stacked package structure with leadframe having bus bar, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein the die pad is provided between the plurality of inner leads and is vertically distant from the plurality of inner leads; a chip-stacked structure formed with a plurality of chips that stacked together and set on the die pad, the plurality of chips and the plurality of inner leads being electrically connected with each other; and an encapsulant covering over the chip-stacked package structure and the leadframe, in which the leadframe comprises at least a bus bar, which is provided between the plurality of inner leads arranged in rows facing each other and the die pad.