Stacked Semiconductor Chip Thermal Management via Non-Functional Interconnects
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Solution Overview
Problem
Stacked semiconductor chip devices face challenges in thermal management and electrical interfacing, with conventional micro bumps being inadequate for heat dissipation and electrical connectivity between chips and circuit boards.
Innovation Solution
The method involves fabricating semiconductor chips with electrically functional interconnects on the front side and non-functional interconnects on the back side, which provide thermal pathways through the deposition of an insulating material to enhance heat dissipation and electrical connectivity between stacked chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electrically functional micro bumps are used to establish die-to-die electrical interfaces, then electrical connectivity between chips is achieved, but heat dissipation capability is insufficient due to small footprint coverage
Solution Approach 1:
The patent divides the interconnect structures into two distinct types: electrically functional micro bumps for electrical connectivity and electrically non-functional micro bumps for thermal management. This segmentation allows each type to be optimized for its specific function without compromise
Solution Approach 2:
The patent creates a universal interconnect system where both electrically functional and non-functional micro bumps coexist on the same chip substrate, providing multi-functionality by simultaneously addressing electrical connectivity and thermal management requirements
2Temperature
If electrically non-functional interconnects are added to the back side of chips, then heat dissipation pathways are improved, but device complexity increases
Solution Approach 1:
The patent merges the fabrication processes for electrically functional and non-functional interconnects into a single integrated manufacturing flow, where both types of micro bumps are formed using the same lithography, deposition, and reflow processes, thereby reducing overall device complexity
3Temperature
If insulating material is deposited between stacked chips to establish thermal contact with non-functional interconnects, then thermal management is improved, but manufacturing precision requirements increase
Solution Approach 1:
The insulating material is deposited in a self-aligned manner where the material automatically conforms to the micro bump structures through capillary action and surface tension during the deposition process, eliminating the need for precise alignment steps and reducing manufacturing precision requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively manages thermal issues by creating efficient heat dissipation pathways and ensures reliable electrical interfacing between semiconductor chips and circuit boards, enabling stable operation at operational power levels and frequencies.
Implementation Method 1
An insulating material is deposited between the first and second semiconductor chips to establish thermal contact with the plural electrically non-functional interconnects
Data Source
AI summary
A method of manufacturing is provided that includes fabricating a first plurality of electrically functional interconnects on a front side of a first semiconductor chip and fabricating a first plurality of electrically non-functional interconnects on a back side of the first semiconductor chip. Additional chips may be stacked on the first semiconductor chip.