Stacked Chip Package Structure for Thin-Wafer Yield Protection
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Solution Overview
Problem
Conventional stacked-type chip package techniques face challenges in producing package structures with chips of varying dimensions while maintaining high production yield rates, due to limitations in flip-chip bonding and wafer thickness polishing.
Innovation Solution
A package process involving a carrier board with an adhesive layer, where first semiconductor devices are fixed and covered with a first molding compound to form a chip array board. Second semiconductor devices are flip-chip bonded to the first devices, and a second molding compound is used to secure and strengthen the chip array board, allowing for the formation of chip package units with varying dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the wafer is polished to decrease the thickness of the wafer before flip-chip bonding, then the whole thickness of the stacked-type chip package is decreased, but the production yield rate is decreased due to fracture in flip-chip bonding and wafer cutting
Solution Approach 1:
The patent applies preliminary action by forming a reinforcement structure (molding compound filling the gap between chips) before the cutting process. This reinforcement is prepared in advance to prevent fracture during subsequent wafer cutting operations, allowing thin wafers to be processed without compromising yield rate.
Solution Approach 2:
The patent implements beforehand cushioning by introducing a molding compound that fills the gap between stacked chips. This compound acts as a cushioning reinforcement that prevents fracture during flip-chip bonding and subsequent cutting processes, enabling the use of thinner wafers while maintaining production yield rate.
2Extent of automation
If conventional flip-chip bonding technique is used, then chips can be stacked, but the process capacitance has a limit value and fracture occurs when wafer thickness is smaller than the limit value
Solution Approach 1:
The patent applies beforehand cushioning by forming a molding compound that fills the gap between stacked chips before the flip-chip bonding process. This compound provides mechanical support and cushioning during bonding, enabling the process to handle thinner wafers that would otherwise be too weak to withstand the bonding forces.
Solution Approach 2:
The patent uses composite materials by combining the wafer, adhesive layer, chips, and molding compound into a reinforced composite structure. The molding compound acts as a reinforcing material that enhances the overall strength of the assembly, allowing thin wafers to be used without compromising bonding integrity.
3Productivity
If wafer is cut along gaps between chips to form chip stacked structures, then chip package density is improved, but fracture easily happens during wafer cutting process
Solution Approach 1:
The patent applies preliminary action by pre-forming a molding compound structure that fills the gaps between chips before the cutting process. This preliminary reinforcement ensures that the wafer structure is strengthened at critical locations before cutting occurs, preventing fracture during the density-improving cutting operation.
Solution Approach 2:
The patent implements beforehand cushioning by introducing molding compound material into the gaps between chips prior to cutting. This compound provides cushioning and structural support during the cutting process, enabling high chip package density to be achieved without compromising production yield rate due to fracture.
Data Source
AI summary
A package structure includes: 1) a circuit substrate; 2) a first semiconductor device disposed on the circuit substrate; 3) a first insulation layer covering a sidewall of the first semiconductor device; 4) a second insulation layer covering the first insulation layer; and 5) a third insulation layer disposed on the circuit substrate and in contact with the second insulation layer.