Stacked Flip-Assembled Chips in Thin Hybrid Substrate

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Solution Overview

Problem

Current technologies face challenges in reducing the size and thickness of semiconductor substrates effectively, particularly for device-stacking and package-on-package methods, which hinders the miniaturization of electronic products and poses risks to expensive chips during substrate fabrication.

Innovation Solution

A hybrid substrate approach using a rigid insulating interposer with high modulus and low-modulus tapes for flip-attached semiconductor chips, where adhesive material holds the chips together, allowing for a thin integrated substrate with excellent electrical performance and mechanical stability, and a flexible fabrication method that can be applied to various semiconductor products.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If conventional substrate fabrication methods are used, then manufacturing process is simple, but substrate thickness cannot be reduced effectively and chip yield is at risk

Engineering Contradiction:
Improvesubstrate thicknessVSAvoidchip yield
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The chips are pre-assembled onto the substrate before the substrate fabrication is completed. This preliminary assembly allows the expensive known-good chips to be protected from fabrication risks, as the substrate build-up is performed after the chips are already in place, eliminating the risk of chip damage during substrate processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conventional sequence is inverted: instead of completing substrate fabrication first and then assembling chips, the chips are assembled first and then the substrate is built up around them. This reversal protects the chips from fabrication risks and enables thinner substrate profiles.

Inventive Principle:
Principle #13The other way round (Inversion)

2Length of stationary object

If device-stacking and package-on-package methods are used, then board thickness can be reduced, but manufacturing complexity increases and process risks increase

Engineering Contradiction:
Improveboard thicknessVSAvoidmanufacturing process complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into distinct phases: chip assembly phase, substrate build-up phase, and interconnection phase. This segmentation allows each phase to be optimized independently, reducing overall manufacturing complexity while achieving thin board profiles through vertical stacking.

Inventive Principle:
Principle #1Segmentation

3Area of stationary object

If substrate area is reduced to shrink product outlines, then product size decreases, but assembly area for chips and components is limited

Engineering Contradiction:
Improveboard areaVSAvoidassembly capacity
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

The assembly architecture transitions from a two-dimensional planar layout to a three-dimensional vertical stacking configuration. By stacking chips and components in multiple layers vertically, the assembly capacity is dramatically increased without increasing the board footprint, effectively resolving the contradiction between compact size and assembly capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables a significant reduction in substrate thickness, enhances product reliability, and allows for faster market introduction of innovative products without requiring chip redesign, while minimizing assembly area and overall system thickness.

Implementation Method 1

Adhesive material holds the tapes parallel to the interposer and the chip surfaces together

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

Solder balls and discrete components may be attached to the outside surfaces of the tapes

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS7898069B2Stacked flip-assembled semiconductor chips embedded in thin hybrid substrate
Publication Date: 2011.03.01 TEXAS INSTRUMENTS INC
  • US7898069B2 patent drawing
  • US7898069B2 patent drawing
  • US7898069B2 patent drawing

AI summary

A semiconductor system having a substrate (101) including a rigid insulating interposer (110) with a high modulus and a top (140) and a bottom (150) low-modulus tape with flip-attached semiconductor chips (120, 130). The assembled chips, with the passive surfaces facing each other, are located in an opening (114) of the interposer, which has a thickness (111) equal to or smaller than the sum of the assembled two chips. Adhesive material (160) holds the tapes parallel to the interposer and the chip surfaces together. Solder balls (180) and discrete components (170) may be attached to the outside surfaces of the tapes.