Stacked CMOS Channel Materials for Balanced NMOS and PMOS Drive Current

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Solution Overview

Problem

Advanced CMOS integrated circuits face limitations in performance due to the use of a single semiconductor material for both n-type and p-type transistors, which restricts achieving the highest electron and hole mobility simultaneously in stacked transistor structures.

Innovation Solution

The implementation of complementary channel materials, where n-type transistors utilize silicon or silicon-germanium alloy with higher electron mobility and p-type transistors use materials like InGaAs or germanium for higher hole mobility, combined with specific crystallinity and gate stack compositions, allows for independent optimization of NMOS and PMOS transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single semiconductor material is used for both n-type and p-type transistors in stacked structures, then manufacturing simplicity is maintained, but transistor performance is limited due to inability to achieve both highest electron and hole mobility simultaneously

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidtransistor performance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The stacked transistor structure is segmented into distinct n-type and p-type transistor regions, each utilizing optimized channel materials. The n-type transistor uses Si channel material while the p-type transistor uses SiGe alloy channel material, allowing independent material optimization for each transistor type within the same stacked structure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different channel materials are applied locally to different transistor types within the stacked structure. Si channel material is used specifically for n-type transistors where electron mobility is critical, while SiGe alloy channel material is used specifically for p-type transistors where hole mobility is critical, achieving local material optimization.

Inventive Principle:

Principle #3Local quality

2Ease of manufacture

If the same channel material is used throughout the stacked structure, then fabrication process is simplified, but drive current performance is compromised

Engineering Contradiction:

Improvefabrication process simplicityVSAvoiddrive current

Core Design Contradiction:

Ease of manufactureVSPower

Solution Approach 1:

The channel material composition parameter is changed between different transistor regions: Si channel material (higher electron mobility) is used for n-type transistors to maximize drive current, while SiGe alloy channel material (higher hole mobility) is used for p-type transistors to maximize drive current. This parameter change enables both transistor types to achieve high drive current performance.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250006737A1Stacked CMOS transistor structures with complementary channel materials

Publication Date: 2025.01.02 INTEL CORP

AI summary

A material stack comprising a plurality of bi-layers, each bi-layer comprising two semiconductor material layers, is fabricated into a transistor structure including a first stack of channel materials that is coupled to an n-type source and drain and in a vertical stack with a second stack of channel materials that is coupled to a p-type source drain. Within the first stack of channel material layers a first of two semiconductor material layers may be replaced with a first gate stack while within the second stack of channel materials a second of two semiconductor material layers may be replaced with a second gate stack.