Stacked CMOS Image Sensor Regulator Architecture
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Solution Overview
Problem
CMOS image sensors face challenges with heat gradient and dark shading issues due to internal regulators in stacked chip structures, which can lead to instability and unintended operations.
Innovation Solution
A solid-state imaging device with a stacked structure featuring a pixel array chip and a logic/chip with an internal regulator, utilizing a reference voltage generation unit, operational amplifier, and output stage transistors to manage voltage and alleviate heat gradients, while maintaining stability with a single error amplifier and dispersed output stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an internal regulator is mounted within the image sensor chip, then power supply flexibility is improved, but heat gradient and dark shading issues occur
Solution Approach 1:
The patent extracts the internal regulator from the first chip (image sensor chip) and places it on the second chip (logic chip). This separation removes the heat-generating regulator from proximity to the pixel array, eliminating the heat gradient and dark shading issues while maintaining the ability to supply power independently to the logic unit.
Solution Approach 2:
The patent introduces a power supply terminal on the first chip as an intermediary connection point. This terminal enables flexible power supply configurations (external or internal regulator) without directly coupling the regulator to the pixel array, thus avoiding heat-related issues while preserving adaptability.
2Power
If multiple output stage transistors are used in the regulator, then power supply capability is improved, but reverse current flow and instability occur
Solution Approach 1:
The patent implements a feedback mechanism using an operational amplifier that monitors the output voltage and adjusts the gate voltage of the output stage transistors accordingly. This feedback control prevents reverse current flow and maintains operational stability even when multiple output stage transistors are used to provide enhanced power supply capability.
Solution Approach 2:
The patent dynamically adjusts the gate voltage parameter of the output stage transistors based on feedback signals. By changing this voltage parameter in response to load conditions, the system maintains stable operation and prevents reverse current while utilizing multiple transistors for increased power capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces heat gradients and dark shading, ensuring stable operation and responsiveness to external power voltage variations, while minimizing power consumption and preventing reverse current flow.
Implementation Method 1
an operational amplifier comparing the reference voltage with an output voltage of the plurality of output stage transistors, wherein a gate voltage of the plurality of output stage transistors is controlled by an output of the operational amplifier
Implementation Method 2
a photoelectric conversion element 21 (hereinafter, sometimes simply referred to as PD) formed of a photo-diode (PD)... performs a photoelectric conversion of an incident light into an amount of charge (in this case, electrons) corresponding to an amount of light thereof
Data Source
AI summary
A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first circuit section, a second circuit section, and a stacked structure in which the first and second circuit sections are bonded, wherein the first circuit section has the pixel array unit disposed therein, and wherein the second circuit section has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.