Stacked Common Electrode Layers for High PPI Display Capacitance
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Solution Overview
Problem
Liquid crystal display devices with high Pixels Per Inch (PPI) suffer from insufficient pixel storage capacitance, leading to display issues such as flicker due to extremely small pixel pitches.
Innovation Solution
A display device structure is implemented with a first and second common electrode layer stacked on a substrate, overlapping with a pixel electrode layer to form storage capacitors, thereby increasing the storage capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel pitch is reduced to achieve high PPI, then display resolution is improved, but pixel storage capacitance becomes insufficient
Solution Approach 1:
The patent transitions from a single-layer common electrode structure to a multi-layer common electrode structure stacked in the vertical dimension. By adding a second common electrode layer above the first, the storage capacitance is increased without expanding the horizontal pixel pitch, thus resolving the contradiction between high resolution and sufficient capacitance.
Solution Approach 2:
The patent implements nested electrode structures where the first and second common electrode layers are stacked vertically, with insulating layers nested between them and the pixel electrode. This nested arrangement maximizes the use of vertical space to increase capacitance while maintaining the compact pixel structure required for high PPI.
2Measurement precision
If pixel pitch is reduced to achieve high PPI, then display definition is improved, but liquid crystal retention ability deteriorates
Solution Approach 1:
The patent addresses liquid crystal retention by adding vertical stacking of common electrode layers, which increases storage capacitance in the vertical dimension. This enhanced capacitance provides better voltage holding capability for liquid crystal molecules, improving retention ability without compromising the horizontal pixel density required for high definition display.
3Measurement precision
If pixel pitch is reduced to achieve high PPI, then VR display quality is improved, but storage capacitance per pixel becomes insufficient
Solution Approach 1:
The patent specifically addresses VR display requirements by implementing stacked common electrode layers that increase storage capacitance in the vertical direction. This allows each pixel to maintain sufficient capacitance even when the horizontal pixel pitch is extremely small for high PPI VR displays, ensuring proper liquid crystal control and display quality.
Solution Approach 2:
The patent uses composite structures combining multiple electrode layers with insulating materials between them. This composite approach creates effective storage capacitors with increased capacitance per pixel, enabling high PPI VR displays to maintain adequate electrical characteristics despite reduced pixel dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased storage capacitance improves liquid crystal retention ability, reducing flicker and enhancing display quality in high PPI VR products.
Implementation Method 1
a first storage capacitor is formed on an overlapping portion of the first common electrode layer and the pixel electrode layer
Implementation Method 2
a second storage capacitor is formed on an overlapping portion of the second common electrode layer and the pixel electrode layer
Data Source
AI summary
A display device includes a substrate and a first common electrode layer, a pixel electrode layer and a second common electrode layer which are stacked on the substrate in turn; wherein an orthographic projection of the first common electrode layer on the substrate is at least partially overlapped with an orthographic projection of the pixel electrode layer on the substrate, and a first storage capacitor is formed on an overlapping portion of the first common electrode layer and the pixel electrode layer; an orthographic projection of the second common electrode layer on the substrate is at least partially overlapped with the orthographic projection of the pixel electrode layer on the substrate, and a second storage capacitor is formed on an overlapping portion of the second common electrode layer and the pixel electrode layer.


