Stacked Electronic Component Package with Spacer Clearance

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Solution Overview

Problem

Existing stacked electronic component packaging methods require large quantities of expensive materials and multiple material interfaces, leading to engineering challenges and reliability risks due to over-curing of adhesives and long cure times.

Innovation Solution

The use of spacers that occupy a small area or volume between electronic components, reducing material interfaces and cure time, with an encapsulant material disposed between center portions of adjacent components to provide clearance for wire bond connections and mechanical support, while minimizing spacer size and material usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large quantities of materials are used to separate stacked electronic components, then clearance for wire bond connections is provided, but material cost and device complexity increase

Engineering Contradiction:
Improveclearance for wire bond connectionsVSAvoidmaterial usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent divides the spacing function into multiple small spacer elements distributed between adjacent electronic components, rather than using large quantities of material. Each spacer provides localized clearance where needed for wire bond connections, achieving reliable separation with minimal material usage.

Inventive Principle:
Principle #1Segmentation

2Strength

If multiple material interfaces are created in stacked packaging, then structural support is provided, but engineering challenges and reliability risks increase due to over-curing of adhesives

Engineering Contradiction:
Improvestructural supportVSAvoidadhesive curing reliability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent extracts the spacing and support function from the adhesive material and assigns it to dedicated spacer elements. This separation allows the adhesive to focus solely on bonding without the added complexity of providing structural clearance, eliminating over-curing issues and reducing material interface complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If traditional spacer configurations are used to provide clearance, then wire bond connection clearance is achieved, but cure time increases

Engineering Contradiction:
Improvewire bond connection clearanceVSAvoidcure time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The spacers are pre-formed with the exact clearance dimensions needed for wire bond connections, eliminating the need for extensive curing processes. The mechanical structure of the spacers provides immediate clearance upon placement, significantly reducing the time required compared to traditional adhesive-based spacing methods.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11552051B2Electronic device package
Publication Date: 2023.01.10 INTEL CORP
  • US11552051B2 patent drawing
  • US11552051B2 patent drawing
  • US11552051B2 patent drawing

AI summary

Electronic device package technology is disclosed. An electronic device package in accordance with the present disclosure can include a substrate, a plurality of electronic components in a stacked relationship, and an encapsulant material encapsulating the electronic components. Each of the electronic components can be electrically coupled to the substrate via a wire bond connection and spaced apart from an adjacent electronic component to provide clearance for the wire bond connection. The encapsulant can be disposed between center portions of adjacent electronic components. Associated systems and methods are also disclosed.